遠藤研究室



 論文リスト:(学術論文誌:178件;国際学会:319件;国内会議:191件)






    2017年 (学術論文誌:8件; 国際学会:4件; 国内会議:2件)



    学術論文誌


  1. Hiroaki Honjo, Shoji Ikeda, Hideo Sato, Koichi Nishioka, Toshinari Watanabe, Sadahiko Miura, Takashi Nasuno, Yasuo Noguchi, Mitsuo Yasuhira, Takaho Tanigawa, Hiroki Koike, Hirofumi Inoue, Masakazu Muraguchi, Masaaki Niwa, Hideo Ohno and Tetsuo Endoh, "Impact of tungsten sputtering condition on magnetic and transport properties of double-MgO magnetic tunneling junction with CoFeB/W/CoFeB free layer", IEEE Transactions on Magnetics , Vol. PP, Issue 99, pp. 1 - 1, May 2017.[DOI: 10.1109/TMAG.2017.2701838]
  2. Takashi Saito, Kenchi Ito, Hiroaki Honjo, Shoji Ikeda and Tetsuo Endoh, "Novel Method of Evaluating Accurate Thermal Stability for MTJs using Thermal Disturbance and its Demonstration for Single /Double Interface p-MTJ", IEEE Transactions on Magnetics, Vol. PP, Issue 99, pp.1-1, March 2017.[DOI: 10.1109/TMAG.2017.2688440]
  3. D. Suzuki, M. Natsui, S. Ikeda, T. Endoh, H. Ohno and T. Hanyu, "Design of a variation-resilient single-ended non-volatile six-input lookup table circuit with a redundant-magnetic tunnel junction-based active load for smart Internet-of-things applications", Electronics Letters, Vol. 53, Issue 7, pp. 456 - 458, March 2017.[DOI: 10.1049/el.2016.4233]
  4. Kazuki Itoh Masakazu Muraguchi, and Tetsuo Endoh, "Integrated voltage regulators with high-side NMOS power switch and dedicated bootstrap driver using vertical body channel MOSFET under 100 MHz switching frequency for compact system and efficiency enhancement", Japanese Journal of Applied Physics(JJAP), Vol. 56, No. 4S, pp. 04CF14, March 2017.[DOI: 10.7567/JJAP.56.04CF14]
  5. Junho Jeong and Tetsuo Endoh, "Ion beam etching process for high-density spintronic devices and its damage recovery by the oxygen showering post-treatment process", Japanese Journal of Applied Physics(JJAP) , Vol. 56, No. 4S, pp. 04CE09, March 2017.[DOI: 10.7567/JJAP.56.04CE09]
  6. Yitao Ma, Sadahiko Miura, Hiroaki Honjo, Shoji Ikeda, Takahiro Hanyu, Hideo Ohno and Tetsuo Endoh, "A spin transfer torque magnetoresistance random access memory-based high-density and ultralow-power associative memory for fully data-adaptive nearest neighbor search with current-mode similarity evaluation and time-domain minimum searching", Japanese Journal of Applied Physics(JJAP), Vol. 56, No. 4S, pp. 04CF08, March 2017. [DOI: 10.7567/JJAP.56.04CF08]
  7. Masanori Natsui, Akira Tamakoshi, Tetsuo Endoh, Hideo Ohno and Takahiro Hanyu, "Fabrication of a magnetic-tunnel-junction-based nonvolatile logic-in-memory LSI with content-aware write error masking scheme achieving 92% storage capacity and 79% power reduction", Japanese Journal of Applied Physics(JJAP), Vol. 56, No. 4S, pp. 04CN01, March 2017. [DOI: 10.7567/JJAP.56.04CN01]
  8. H. Honjo, S. Ikeda, H. Sato, T. Watanebe, S. Miura, T. Nasuno, Y. Noguchi, M. Yasuhira, T. Tanigawa, H. Koike, M. Muraguchi, M. Niwa, K. Ito, H. Ohno and T. Endoh, "Origin of variation of shift field via annealing at 400◦C in a perpendicular-anisotropy magnetic tunnel junction with [Co/Pt]-multilayers based synthetic ferrimagnetic reference layer", AIP Advances, Vol. 7, pp. 055913, January 2017. [DOI: 10.1063/1.4973946]


  9. 国際学会


  10. Tetsuo Endoh, "High Performance STT-MRAM and 3D NAND Memory with Vertical MOSFET Technology", Communications Microsystems Optoelectronics Sensors Emerging Technologies Research 2017 (CMOSETR2017), Hotel Sofitel Warsaw Victoria, May 29, 2017.
  11. Tetsuo Endoh, "Innovative Integrated Systems for IoT/AI", Nanotechnology Workshop, Indiana University-Purdue University Indianapolis, US, May 9 2017.
  12. Tetsuo Endoh, "Embedded Nonvolatile Memory with STT-MRAMs and its Application for Nonvolatile Brain-Inspired VLSIs", 2017 International Symposium on VLSI Technology, Systems and Applications (VLSI-TSA), Ambassador Hotel Hsinchu, Taiwan, China, April 26 2017.
  13. Tetsuo Endoh, "STT-MRAM and its Application for Nonvolatile Brain-Inspired VLSIs", SEMICON CHINA, Shanghai International Convention Center, Shanghai, China, March 12 2017.


  14. 国内会議


  15. 遠藤哲郎、「IoT/AIチップの革新的集積システム開発プラットフォーム」、CRDSシンポジウム、丸ビルホール, 東京, 2017年3月7日.
  16. 遠藤哲郎、「IoT・ビッグデータ社会に向けた新たなメモリ技術と、そのシステム」、第4回InfoEver研究会、公益財団法人国際高等研究所 レクチャーホール,京都, 2017年1月27日.



  17. 2016年 (学術論文誌:10件; 国際学会:17件; 国内会議:11件)



    学術論文誌


  18. Takahiro Hanyu; Tetsuo Endoh; Daisuke Suzuki; Hiroki Koike; Yitao Ma; Naoya Onizawa; Masanori Natsui; Shoji Ikeda; Hideo Ohno, "Standby-Power-Free Integrated Circuits Using MTJ-Based VLSI Computing", Proceedings of the IEEE, Vol. 104, Issue 10, pp. 1844 - 1863, October 2016. [DOI: 10.1109/JPROC.2016.2574939]
  19. Kunihiro Tsubomi, Masakazu Muraguchi, and Tetsuo Endoh, "Novel current collapse mode induced by source leakage current in AlGaN/GaN high-electron-mobility transistors and its impact", Vol. 55, pp. 08PD06(5pages), July 2016. [DOI: 10.7567/JJAP.55.08PD06]
  20. S. Sato, K. Yamabe, T. Endoh and M. Niwa, "Failure Analysis of a SiC MOS Capacitor with a Poly-Si Gate Electrode", Materials Science Forum, Vol. 858, pp. 485-488, May 2016. [DOI: 10.4028/www.scientific.net/MSF.858.485]
  21. Yitao Ma, Sadahiko Miura, Hiroaki Honjo, Shoji Ikeda, TakahiroHanyu, Hideo Ohno, Tetsuo Endoh, "A 600-μW Ultra-Low-Power Associative Processor for Image Pattern Recognition Employing MTJ-Based Nonvolatile Memories with Autonomic Intelligent Power-Gating (IPG) Scheme", Japanese Journal of Applied Physics(JJAP) , Vol. 55, No. 4S, pp. 04EF15(11pages), March 2016. [DOI: 10.7567/JJAP.55.04EF15]
  22. Tetsuo Endoh, Hiroki Koike, Shoji Ikeda, Takahiro Hanyu, and Hideo Ohno, "An Overview of Nonvolatile Emerging Memories-Spintronics for Working Memories", IEEE Journal on Emerging and Selected Topics in Circuit and Systems (JESCAS), 11pages, accepted, March 2016. [DOI: 10.1109/JETCAS.2016.2547704]
  23. Hiroyuki Kageshima, Kenji Shiraishi and Tetsuo Endoh, "Extension of silicon emission model to silicon pillar oxidation", Japanese Journal of Applied Physics(JJAP), Vol. 55, pp. 08PE02(5pages), May 2016. [DOI:10.7567/JJAP.55.08PE02]
  24. Soshi Sato, Kikuo Yamabe, Tetsuo Endoh and Masaaki Niwa, "Formation mechanism of concave by dielectric breakdown on silicon carbide metal-oxide-semiconductor capacitor", Microelectronics Reliability, Vol. 58, pp. 185-191, March 2016. [DOI:10.1016/j.microrel.2015.09.016]
  25. Soshi Sato, Hiroaki Honjo, Shoji Ikeda, Hideo Ohno, Tetsuo Endoh and Masaaki Niwa, "Study on initial current leakage spots in CoFeB-capped MgO tunnel barrier by conductive atomic force microscopy", Japanese Journal of Applied Physics(JJAP) , Vol. 55, No. 4S, pp. 04EE05(7pages), March 2016. [DOI: 10.7567/JJAP.55.04EE05]
  26. H. Honjo, S. Ikeda, H. Sato, S. Sato, T. Watanabe, S. Miura, T. Nasuno, Y. Noguchi, M. Yasuhira, T. Tanigawa, M. Muraguchi, M. Niwa, K. Ito, H. Ohno and T. Endoh, "Improvement of thermal tolerance of CoFeB-MgO perpendicular-anisotropy magnetic tunnel junctions by controlling boron composition", IEEE Transactions on Magnetics, Vol. PP, Issue 99, pp. 1-4, January 2016. [DOI: 10.1109/TMAG.2016.2518203]
  27. 遠藤哲郎, 小池洋紀, 池田正二, 羽生貴弘, 大野英男, 「スピントロニクスのデバイス応用」, 電子情報通信学会論文誌 C, Vol.J99-C No.1 pp.1-9, January 2016.


  28. 国際学会


  29. Tetsuo Endoh, "Nonvolatile Brain-Inspired VLSIs Based on CMOS/MTJ Hybrid Technology for Ultralow-Power Performance and Compact Chip", 61st Annual Conference on Magnetism and Magnetic Materials (MMM), New Orleans, Louisiana, November 2, 2016
  30. Tetsuo Endoh, "STT-MRAM and MTJ/CMOS Hybrid NV-logic for Low Power Systems", EMN LasVegas Meetings, South Point Hotel, Casino & Spa, USA, October 12, 2016.
  31. Kazuki Itoh; Masakazu Muraguchi; Tetsuo Endoh, "High accurate and low loss current sensing method with novel current path narrowing method for DC-DC converters and its demonstration", 2016 IEEE International Telecommunications Energy Conference (INTELEC), pp. 1-6, Austin, TX, USA, October 23-27, 2016. [DOI: 10.1109/INTLEC.2016.7749132]
  32. S.Ohuchida, K.Ito, M.Muraguchi and T.Endoh. "New Model of Switching Delay Induced by Modulation Effect of Damping and STT Pumping Balance With Programing Current and Interference Phenomena in P-MTJ Array", Intenational Conference on Solid State Devices and Materials (SSDM), G-3-04, Tsukuba, September 26- 29, 2016.
  33. Y. Ma, S. Miura, H. Honjo, S. Ikeda, T. Hanyu, H. Ohno and T. Endoh, "A Compact and Ultra-Low-Power STT-MRAM-Based Associative Memory for Nearest Neighbor Search with Full Adaptivity of Template Data Format Employing Current-Mode Similarity Evaluation and Time-Domain Minimum Searching", Intenational Conference on Solid State Devices and Materials (SSDM), B-2-06, Tsukuba, September 26- 29, 2016.
  34. M.Natsui, A.Tamakoshi, T.Endoh, H.Ohno and T.Hanyu, "Highly Reliable MTJ-Based Nonvolatile Logicin-Memory LSI with Content-Aware Write Error Masking Scheme", International Conference on Solid State Devices and Materials (SSDM2016), B-2-03, pp. 77-78, Tsukuba, Japan, September 2016.
  35. J.Jeong and T.Endoh, "Study about the Ion Beam Etching (IBE) Process for the High Density Spintronic Devices and its Damage Recovery by the Oxygen Showering Post-treatment" 2016 International Conference on Solid State Devices and Materials (SSDM), B-2-02, Tsukuba, September 26- 29, 2016.
  36. K.Itoh, M.Muraguchi and T.Endoh, "Novel Integrated Voltage Regulators with High-Side NMOS Power Switch and Dedicated Bootstrap Driver Using Vertical MOSFET for Efficiency Enhancement", 2016 International Conference on Solid State Devices and Materials (SSDM), PS-5-01, pp. 743-744, Tsukuba, September 26- 29, 2016.
  37. 遠藤哲郎, 「High Performance STT-MRAM and 3D NAND Memory with Spintronics and Vertical MOSFET Technology」, SEMICON WEST 2016, Moscone Center, サンフランシスコ, USA, 2016年7月13日.
  38. Y. Ma and T. Endoh, "Effect of MTJ resistance fluctuations on synapse stability of MTJ-based nonvolatile neuron circuit for high-speed object recognition", Asia-Pacific Workshop on Fundamentals and Applications of Advanced Semiconductor Devices (AWAD 2016), B5-6, Hakodate Kokusai Hotel, Hakodate, Japan, July 4-6, 2016.
  39. K. Itoh, M. Muraguchi and T. Endoh, "Novel inductor current to digital converter and its concept evaluation", Asia-Pacific Workshop on Fundamentals and Applications of Advanced Semiconductor Devices (AWAD 2016), B1-5, pp. 77-82, Hakodate Kokusai Hotel, Hakodate, Japan, July 4-6, 2016.
  40. M. Natsui; A. Tamakoshi; A. Mochizuki; H. Koike; H. Ohno; T. Endoh; T. Hanyu, "Stochastic behavior-considered VLSI CAD environment for MTJ/MOS-hybrid microprocessor design", 2016 IEEE International Symposium on Circuits and Systems (ISCAS), pp: 1878-1881, QC, Canada, May 22-25, 2016. [DOI: 10.1109/ISCAS.2016.7538938]
  41. Hiroki Koike, Sadahiko Miura, Hiroaki Honjo, Toshinari Watanabe, Hideo Sato, Soshi Sato, Takashi Nasuno, Yasuo Noguchi, Mitsuo Yasuhira, Takaho Tanigawa, Masakazu Muraguchi, Masaaki Niwa , Kenchi Ito, Shoji Ikeda, Hideo Ohno and Tetsuo Endoh, "Demonstration of Yield Improvement for On-Via MTJ Using a 2-Mbit 1T-1MTJ STT-MRAM Test Chip", 2016 IEEE 8th International Memory Workshop (IMW), pp: 1-4, Paris, France, May 15-18, 2016. [DOI: 10.1109/IMW.2016.7495264]
  42. Tetsuo Endoh, "Novel High Performance NV-Working Memory with Spintronics and Vertical MOSFET Technology", 2016 MRS Spring Meeting&Exhibit, EP11.1.08, Phoenix Convention Center, Arizona, USA, March 28, 2016.
  43. J. Jeong and T. Endoh, "Electric and magnetic improvements of the patterned MTJs by the damage recovery using the novel oxygen showering post-treatment (OSP) process at the argon ion milling etching (AIME) scheme", 13th Joint MMM-Intermag Conference, BT-02, San Diego, USA, January 14, 2016.
  44. H. Honjo, H. Sato, S. Ikeda, S. Sato, T. Watanebe, S. Miura, T. Nasuno, Y. Noguchi, M.Yasuhira, T.Tanigawa, H.Koike, M.Muraguchi, M.Niwa, K.Ito, H.Ohno and T.Endoh, “Optimum boron concentration difference between single and double CoFeB/MgO interface perpendicular MTJs with high thermal tolerance and its mechanism”, 13th Joint MMM-Intermag Conference, FB-06,San Diego, USA, January 14, 2016.
  45. S. Ohuchida, M. Murauchi, K. Itoh and T. Endoh, “Increase of Critical Switching Current Density of 10 nm p-MTJ in 4F2 Cell Array Due to Inter-cell Interference Phenomenon”, 13th Joint MMM-Intermag Conference, GV-01, San Diego、USA, January 12, 2016.


  46. 国内会議


  47. 遠藤哲郎、「IoTに求められる革新的エレクトロニクス技術 ~オープンイノベーション型産学地域連携の重要性」、ものづくりイノベーションセミナー、TKPガーデンシティPREMIUM, 仙台, 2016年12月20日.
  48. 遠藤哲郎、「STT-MRAM and CMOS/MTJ Hybrid NV-Logic for Future Low Power System」、SEMICON Japan 2016,東京ビッグサイト, 東京, 2016年12月16日.
  49. 遠藤哲郎、「Low Power NV-Working Memory and NV-Logic with Spintronics/CMOS Hybrid ULSI Technology」、 第40回日本磁気学会学術講演会、金沢大学 自然科学研究科棟, 石川県, 2016年9月5日.
  50. 遠藤哲郎, 「STT-MRAM and MTJ/CMOS Hybrid NV-Logic for Ultra Low Power Systems」, ナノデバイス科学研究会--第3回実用スピントロニクス新分野創成研究会, 東京大学本郷キャンパス工学部11号館講堂, 東京都, 2016年8月19日.
  51. 遠藤哲郎, 「CIESコンソーシアムにおける産学連携」, シリコン超集積化システム第165委員会第82回研究会, 東京大学生産技術研究所An棟An401/402号室, 東京都, 2016年7月22日.
  52. 遠藤哲郎, 「3次元構造技術とスピントロニクス技術による 半導体メモリの新展開」, 創発物性科学研究センターコロキウム, 理化学研究所 和光地区 大河内ホール, 埼玉県, 2016年5月25日.
  53. 小池 洋紀, 三浦 貞彦, 本庄 弘明, 渡辺 俊成, 佐藤 英夫, 佐藤 創志, 那須野 孝, 野口 靖夫, 安平 光雄, 谷川 高穂, 村口 正和, 丹羽 正昭, 伊藤 顕知, 池田 正二, 大野 英男, 遠藤 哲郎、 「適応型リファレンス電圧生成回路を用いた1T1MTJ STT-MRAMセルアレイ設計」, 電子情報通信学会技術研究報告、 Vol. 116, No. 3, pp. 51-56, 2016年4月 14日
  54. 佐藤創志、山部紀久夫、遠藤哲郎、丹羽正昭、 「Poly-Si 電極を用いたSiC MOS キャパシタの絶縁破壊後に見出した特徴的な破壊箇所」, 電子デバイス界面テクノロジー研究会-材料・プロセス・デバイス特性の物理-(第21回)、 セッション7-4、pp. 93 - 96、静岡県、2016年1月 24日
  55. 佐藤創志、本庄弘明、池田正二、大野英男、遠藤哲郎、丹羽正昭、 「磁気トンネル接合素子のMgO 膜における初期電流リークスポット密度のconductive AFM 法による評価手法解析」, 電子デバイス界面テクノロジー研究会-材料・プロセス・デバイス特性の物理-(第21回)、セッション3-2、pp. 31 - 34、静岡県、2016年1月 22日
  56. 川内伸悟、白川裕規、洗平昌晃、影島愽之、遠藤哲郎、白石賢二、「Si/SiO2(100)界面における熱酸化過程、水素アニール効果の 歪み依存性に関する理論的研究」, 電子デバイス界面テクノロジー研究会-材料・プロセス・デバイス特性の物理-(第21回)、セッションP-28、pp. 221 - 224、静岡県、2016年1月 22日
  57. 影島博之、白石賢二、遠藤哲郎、「シリコンピラー酸化の理論的考察」, 平成27年度静岡大学電子工学研究所共同研究プロジェクト合同研究会, pp.47-48、静岡県浜松市、2016年1月8日



  58. 2015年 (学術論文誌:11件; 国際学会:30件; 国内会議:13件。)



    学術論文誌


  59. Junho Jeong and Tetsuo Endoh, "Study about the damaged mechanism of the patterned perpendicular magnetic tunnel junctions by hydrogen ion treatments", Japanese Journal of Applied Physics(JJAP) , Vol. 54, No. 4S, pp. 04DM07(4pages), March 2015. [DOI: 10.7567/JJAP.54.04DM07]
  60. Hiroki Koike, Takashi Ohsawa, Sadahiko Miura, Hiroaki Honjo, Shoji Ikeda, Takahiro Hanyu, Hideo Ohno and Tetsuo Endoh, "Power-gated 32 bit microprocessor with a power controller circuit activated by deep-sleep-mode instruction achieving ultra-low power operation", Japanese Journal of Applied Physics(JJAP) , Vol. 54, No. 4S, pp. 04DE08(5pages), March 2015. [DOI: 10.7567/JJAP.54.04DE08]
  61. Takuya Imamoto, Yitao Ma, Masakazu Muraguchi and Tetsuo Endoh, "Low-frequency noise reduction in vertical MOSFETs having tunable threshold voltage fabricated with 60 nm CMOS technology on 300 mm wafer process", Japanese Journal of Applied Physics(JJAP), Vol. 54, No. 4S, pp. 04DC11(7pages), March 2015. [DOI: 10.7567/JJAP.54.04DC11]
  62. S. Tanoi and T. Endoh, “A-High frequency Level-up shifter Based on 0.18um Vertical MOSFETs with More than 70% Reduction of Overshoot-voltage Above VDD”, Vol. 54, No. 4S, pp. 04DE03(9pages), March 2015. [DOI: 10.7567/JJAP.54.04DE03]
  63. Satoshi Ohuchida, Kenchi Ito and Tetsuo Endoh, "Impact of Sub-Volume Excitation for Improving Overdrive Delay Product in Sub-40nm p-MTJ and Its Beyond", Japanese Journal of Applied Physics(JJAP), Vol. 54, No. 4S, pp. 04DD05(5pages), March 2015. [DOI: 10.7567/JJAP.54.04DD05]
  64. Junho Jeong and Tetsuo Endoh, "Improvement of electric and magnetic properties of patterned magnetic tunnel junctions by recovery of damaged layer using oxygen showering post-treatment process", Journal of Applied Physics(JAP), Vol. 117, pp. 17D906 (4pages), February 2015. [DOI: 10.1063/1.4908017]
  65. 苅谷隆, 田野井聡, 森田治彦, 加藤忍, 遠藤哲郎, 「スピントロニクス不揮発性ロジックのパワーゲーティング時における電源ノイズ評価とパッケージへのチップキャパシタ搭載効果の検討」, 電子情報通信学会論文誌 C, Vol.J98-C, No.1,pp.8-17, 2015年1月1日. [URL]
  66. S. Sato, H. Honjo, S. Ikeda, H. Ohno, T. Endoh and M. Niwa, "Driving Force in Diffusion and Redistribution of Reducing Agents during Redox Reaction on the Surface of CoFeB Film", IEEE Transactions on Magnetics, Vol. 51, Issue 11, pp. 3400804(4pages), November 2015. [DOI: 10.1109/TMAG.2015.2434840]
  67. Soshi Sato, Hiroaki Honjo, Shoji Ikeda, Hideo Ohno, Tetsuo Endoh and Masaaki Niwa, "Evidence of a reduction reaction of oxidized iron/cobalt by boron atoms diffused toward naturally oxidized surface of CoFeB layer during annealing", Applied Physics Letters , Vol. 106, No. 14, pp. 142407(5pages), April 2015. [DOI: 10.1063/1.4917277]
  68. Sadahiko Miura, Hiroaki Honjo, Keizo Kinoshita, Keiichi Tokutome, Hiroaki Koike, Shoji Ikeda, Tetsuo Endoh and Hideo Ohno, "Properties of perpendicular-anisotropy magnetic tunnel junctions fabricated over the bottom electrode contact", Japanese Journal of Applied Physics(JJAP), Vol. 54, No. 4S, pp. 04DM06(4pages), March 2015. [DOI: 10.7567/JJAP.54.04DM06]
  69. Kenchi Ito, Satoshi Ohuchida, Masakazu Muraguchi and Tetsuo Endoh, "Landau-Lifshitz-Gilbert micromagnetic simulation on spin transfer torque efficiency of sub-30 nm perpendicular magnetic tunnel junctions with etching damage", Japanese Journal of Applied Physics(JJAP), Vol. 54, No. 4S, pp. 04DM01(5pages), March 2015. [DOI: 10.7567/JJAP.54.04DM01]


  70. 国際学会


  71. H. Koike, Y. Ma, and T. Endoh, “High-Density and Low-Power Applications of Spintronics Circuits: 1T1MTJ-MRAM Array Design, and 4T2MTJ-MRAM-based Pattern Recognition Processor”, International Workshop: Spintronics VLSI, Sendai, Japan, November 21, 2015.
  72. T. Endoh, "Novel High Performance NV-Working Memory with Spintronics and Vertical MOSFET Technology",The 11th International Workshop on Radiation Effects on Semiconductor Devices for Space Applications(11th RASEDA) , 13-1, Kiryu City Performing Arts Center, Gunma, November 11-13.
  73. K. Tsubomi, M. Muraguchi and T. Endoh, “Novel Current Collapse Mode Induced by Source Leakage Current in AlGaN/GaN HEMTs “, 2015 International Workshop on Dielectric Thin Films for Future Electron Devices Science and Technology(2015IWDTF), S4-2, pp. 83 - 84, Tokyo, Japan, November 3, 2015.
  74. T. Endoh, "STT-MRAM for Nonvolatile Working Memories", The 15th Non-Volatile Memory Technology Symposium (NVMTS2015), Session 5, Tsinghua University, Beijing, China, October 12-14, 2015.
  75. M.Muraguchi and T. Endoh, "Novel Design of Electrostatic Lens Potential for Improving Bending Curvature and Transmission Probability of Drive Current for Vertical Body Channel MOSFET", 2015 International Conference on Solid State Devices and Materials(SSDM), PS-9-9, pp. 342-343, Sapporo, September 27- 30, 2015,
  76. J. H. Jeong and T. Endoh, "Universal Damage Recovery Scheme using the Oxygen Showering Post-treatment (OSP) Process for Sub-20nm High Density STT-MRAM Devices", 2015 International Conference on Solid State Devices and Materials(SSDM), O-5-3, pp. 1182-1183, Sapporo, September 27- 30, 2015,
  77. S. Ohuchida, K. Ito, M. Muraguchi and T. Endoh, "10 nm p-MTJ Array Design for Suppressing Switching Delay Induced by Interference Due to Magnetic Dipole Interaction for High Density STT-MRAM",2015 International Conference on Solid State Devices and Materials(SSDM), O-5-2, pp. 1180-1181, Sapporo, September 27- 30, 2015,
  78. Y. Ma, S. Miura, H. Honjo, S. Ikeda, T. Hanyu, H. Ohno, T. Shibata and T. Endoh, "A 600-μW Ultra-Low-Power Associative Processor for Image Pattern Recognition Employing Magnetic Tunnel Junction (MTJ) Based Nonvolatile Memories with Novel Intelligent Power-Gating (IPG) Scheme",2015 International Conference on Solid State Devices and Materials(SSDM), O-4-2, pp. 1172-1173, Sapporo, September 27- 30, 2015,
  79. Kazuki Itoh, Masakazu Muraguchi, and Tetsuo Endoh, "Switch Toggling Technique of Parallel MOSFET Topology for Power Electronics Circuits with Uniform Thermal Distribution", Asia-Pacific Workshop on Fundamentals and Applications of Advanced Semiconductor Devices (AWAD 2015), 4B-3, pp. 284-289, Jeju KAL Hotel, Jeju Island, Korea, June 29-July 1, 2015.
  80. Yitao Ma and Tetsuo Endoh, "A Novel Neuron Circuit with Nonvolatile Synapses Based on Magnetic-Tunnel-Junction for High-Speed Pattern Learning and Recognition", Asia-Pacific Workshop on Fundamentals and Applications of Advanced Semiconductor Devices (AWAD 2015), 4B-1, pp. 273-278, Jeju KAL Hotel, Jeju Island, Korea, June 29-July 1, 2015.
  81. Yitao Ma and Tetsuo Endoh, "A High-Speed Pattern Matching Processor Employing Adaptive Nonlinear Similarity Evaluation for Visual-Attention-Based Object Recognition", Asia-Pacific Workshop on Fundamentals and Applications of Advanced Semiconductor Devices (AWAD 2015), 6A-3, pp. 326-331, Jeju KAL Hotel, Jeju Island, Korea, June 29-July 1, 2015.
  82. Taro Sasaki, Masakazu Muraguchi, Takahiro Shinada, and Tetsuo Endoh, "A Study of Strain Profile in Channel Region of Vertical MOSFET for Improving Drivability", Asia-Pacific Workshop on Fundamentals and Applications of Advanced Semiconductor Devices (AWAD 2015), 1A-2, pp. 25-29, Jeju KAL Hotel, Jeju Island, Korea, June 29-July 1, 2015.
  83. Masakazu Muraguchi and Tetsuo Endoh, "Channel Length Dependence of Electrostatic Lens Effect in Vertical Body Channel MOSFET", Asia-Pacific Workshop on Fundamentals and Applications of Advanced Semiconductor Devices (AWAD 2015), 1A-4, pp. 33-36, Jeju KAL Hotel, Jeju Island, Korea, June 29-July 1, 2015.
  84. J. H. Jeong and T. Endoh, "Novel Oxygen Showering Process (OSP) for Extreme Damage Suppression of Sub-20nm High Density p-MTJ Array without IBE Treatment", 2015 Symposium on VLSI Technology (VLSIT) & 2015 Symposium on VLSI Cricuit (VLSIC) Digest of Technical Papers , S12-1, pp. T158-159, Honolulu, Hawaii, USA, June 16-19, 2015.
  85. Tetsuo Endoh, "Nonvolatile Logic and Memory Devices Based on spintronics", 2015 IEEE International Symposium on Circuits and Systems (ISCAS), pp. 13-16, Cultural Center of Belem (CCB), Lisbon, Portugal, May 24-27, 2015. [DOI: 10.1109/ISCAS.2015.7168558]
  86. Hiroki Koike, Sadahiko Miura, Hiroaki Honjo, Tosinari Watanabe, Hideo Sato, Soshi Sato, Takashi Nasuno, Yasuo Noguchi, Mitsuo Yasuhira, Takaho Tanigawa, Masakazu Muraguchi, Masaaki Niwa, Kenchi Ito, Shoji Ikeda, Hideo Ohno, and Tetsuo Endoh, "1T1MTJ STT-MRAM Cell Array Design with an Adaptive Reference Voltage Generator for Improving Device Variation Tolerance", International Memory Workshop (IMW), pp. 1-4, Monterey, CA, USA, May 17-20, 2015. [DOI: 10.1109/IMW.2015.7150264]
  87. Tetsuo Endoh, "Low Power and High Speed Working Memory with Spintronics and Vertical MOSFET Technology", COOL Chips XVIII, Session X: Keynote Presentation 4, Yokohama Joho Bunka Center, Yokohama, Japan, April 13-15, 2015.
  88. Tetsuo Endoh, "Semiconductor Memory (STT-MRAM)", 2015 International Symposium on VLSI Technology, Systems and Applications (VLSI-TSA), pp. 1-2, Session TR7: NVM, Ambassador Hotel Hsinchu, Hsinchu, April 27-29, 2015. [DOI: 10.1109/VLSI-TSA.2015.7117581]
  89. Tetsuo Endoh、”Future Memory Technology with Vertical MOSFET and STT-MRAM for Ultra Low Power Systems”, KCS (Korean Conference on Semiconductors) 2015, Songdo ConvensiA, 韓国、インチョン, February 11, 2015.
  90. T. Endoh, “MTJ based Non-Volatile Microcontroller and its MTJ/CMOS Hybrid Technology”, 1st ImPACT International Symposium on Spintronic Memory, Circuit and Storage , Tokyo, Japan, June 22, 2015.
  91. H. Kageshima, K. Shiraishi, and T. Endoh, “Extension of Silicon Emission Model for Silicon Pillar Oxidation”, 2015 International Workshop on Dielectric Thin Films for Future Electron Devices Science and Technology(2015IWDTF), S5-4, pp. 99 - 100,Tokyo, Japan, November 4, 2015.
  92. S. Sato, K. Yamabe, T. Endoh and M. Niwa, “Failure Analysis of a SiC MOS Capacitor with a Poly-Si Gate Electrode”, 16 th International Conference on Silicon Carbide and Related Materials (ICSCRM 2015) , ?Th‐2A‐2, Giardini Naxos, Italy, October 8, 2015.
  93. Takahiro Hanyu, Masanori Natsui, Daisuke Suzuki, Akira Mochizuki, Naoya Onizawa, Shoji Ikeda, Tetsuo Endoh and Hideo Ohno, "Challenge of MTJ-based nonvolatile logic-in-memory architecture for ultra low-power and highly dependable VLSI computing", 2015 IEEESOI-3D-Subthreshold Microelectronics Technology Unified Conference (S3S), pp. 1-3, Rohnert Park, CA, USA, June 29-July2, 2015. [DOI:10.1109/S3S.2015.7333502]
  94. S. Kawachi, H. Hiroki, M. Araidai, H. Kageshima, T.Endoh and K.Shiraishi, "First-Principles Study on Hydrogen Annealing Effect in Si/SiO2 Interface by Thermal Oxidation", 2015 International Conference on Solid State Devices and Materials(SSDM), PS-1-17, pp. 40-41, Sapporo, September 27- 30, 2015,
  95. S. Sato, H. Honjo, S. Ikeda, H. Ohno, T. Endoh and M. Niwa, "Optimization of CoFeB Capping Layer Thickness for Characterization of Leakage Spot in MgO Tunneling Barrier of Magnetic Tunnel Junction", 2015 International Conference on Solid State Devices and Materials(SSDM), O-5-4, pp. 1184-1185, Sapporo, September 27- 30, 2015,
  96. S. Sato, Y. Hiroi, K. Yamabe, M. Kitabatake, T. Endoh and M. Niwa, "Effect of series resistance on dielectric breakdown phenomenon of silicon carbide MOS capacitor", 2015 IEEE 22nd International Symposium on the Physical and Failure Analysis of Integrated Circuits (IPFA), pp. 72-75, Hsinchu, China, June 29-July2, 2015. [DOI:10.1109/IPFA.2015.7224336]
  97. D. Suzuki, M. Natsui, A. Mochizuki, S. Miura, H. Honjo, H. Sato, S. Fukami, S. Ikeda, T. Endoh, H. Ohno and T. Hanyu, "Fabrication of a 3000-6-Input-LUTs Embedded and Block-Level Power-Gated Nonvolatile FPGA Chip Using p-MTJBased Logic-in-Memory Structure", 2015 Symposium on VLSI Technology (VLSIT) & 2015 Symposium on VLSI Cricuit (VLSIC) Digest of Technical Papers, JFS3-2, pp. C172-173 , Honolulu, Hawaii, USA, June 16-19, 2015.
  98. H. Honjo, H. Sato, S. Ikeda, S. Sato, T. Watanebe, S. Miura, T. Nasuno, Y. Noguchi, M. Yasuhira, T. Tanigawa, H. Koike, M. Muraguchi, M. Niwa, K. Ito, H. Ohno and T. Endoh, "10 nmφ perpendicular-anisotropy CoFeB-MgO magnetic tunnel junction with over 400℃ high thermal tolerance by boron diffusion control", 2015 Symposium on VLSI Technology (VLSIT) & 2015 Symposium on VLSI Cricuit (VLSIC) Digest of Technical Papers , S12-2, pp. T160-161, Honolulu, Hawaii, USA, June 16-19, 2015.
  99. S. Sato, H. Honjo, S. Ikeda, H. Ohno, T.Endoh and M. Niwa, "Diffusion behaviors observed on the surface of CoFeB film after the natural oxidation and the annealing", 2015 IEEE Magnetics Conference (INTERMAG), GP-01, Beijing, China, May 11-15, 2015. [DOI: 10.1109/INTMAG.2015.7157496]
  100. T. Shinada, Y. Ohshima, and T. Endoh, “Creation of innovative integrated electronic technologies through international industry-academic consortium (CIES consortium) : From material/device/process to LSI/system”, 11th International Nanotechnology Conference on Communication and Cooperation (INC 11), Fukuoka, Japan, May 12, 2015."


  101. 国内会議


  102. 遠藤哲郎, 「東北大学国際集積エレクトロニクス研究開発センター(CIES)」, SEMICON Japan 2015, 東京ビックサイト, 東京, 2015年12月16日-18日.
  103. 遠藤哲郎, 「国際産学共同研究による革新的省エネルギー集積エレクトロニクスの創出~材料・デバイスから回路・システムまで~」, 東北大学イノベーションフェア2015, 丸ビルホール, 東京都, 仙台国際センター, 仙台, 2015年12月9日.
  104. 遠藤哲郎, 「 IoT社会を支えるパワーデバイス技術と革新的パワーマネージメント技術」, 東京フォーラム2015, 学術総合センター, 東京, 2015年11月25日.
  105. 遠藤哲郎, 「次世代集積エレクトロニクス産業の将来と、宮城県における事業化機会の展望」, 第一回集積エレクトロニクス技術・事業化検討会, 東北大学 片平キャンパス, 仙台, 2015年9月24日.
  106. 遠藤哲郎, 「科学は社会をどう変革するのか?~トップサイエンスからトップイノベーションへ~」, ACCELシンポジウム(パネルディスカッション), 丸ビルホール, 東京都, 2015年9月12日
  107. 遠藤哲郎, 「社会の耐災害性を高めるスピントロニクスによる不揮発性ワーキングメモリ技術とそのシステム応用」, 日本磁気学会 第203回研究会, 日本大学, 駿河台キャンパス, 東京, 2015年7月24日-25日.
  108. 遠藤哲郎, 「集積エレクトロニクス領域における産学連携拠点の現状とチャレンジ」, 第62回応用物理学会春季学術講演会, 東海大学湘南キャンパス, 神奈川, 2015年3月12日.
  109. 遠藤哲郎, 「新たな産学連携ACCEL開発」, CREST「次世代エレクトロニクスデバイスの創出に資する革新的材料・プロセス研究」領域ワークショップ, アキバプラザ・セミナールーム2, 東京, 2015年2月6日.
  110. 遠藤哲郎, 「Impact of 3D Structured LSI with VerticalMOSFET for Future Systems」,システムナノ技術によるイノベーションへの展開に向けて第1回研究会, 東京大学 武田先端知ビル 武田ホール, 東京, 2015年2月5日.
  111. 夏井雅典、鈴木大輔、池田正二、遠藤哲郎、大野英男、羽生貴弘、 「MTJ素子を活用した高性能・高信頼VLSI設計技術」、応用物理学会スピントロニクス研究会・日本磁気学会スピンエレクトロニクス専門研究会・日本磁気学会ナノマグネティックス専門研究会共同主催研究会、東京都、2015年11月12日
  112. 成田 克, 高橋 豊, 原田 正英, 大井 元貴, 及川 健一, 小林 大輔, 廣瀬 和之, 石川 慎也, E. C. I. Enobio, 佐藤 英夫, 池田 正二, 遠藤 哲郎, 大野 英男, 「垂直磁気異方性 CoFeB-MgO 磁気トンネル接合の高速中性子耐性評価(II)」, 第76回応用物理学会秋季学術講演会, 13p-PA7-3, 名古屋国際会場, 名古屋, 2015年9月13日-16日.
  113. 川内伸悟, 白川裕規, 洗平昌晃, 影島愽之, 遠藤哲郎, 白石賢二, 「シリコン熱酸化膜の水素アニール効果に関する第一原理計算」, シリコン材料・デバイス研究会(SDM)、名古屋大学、2015年6月19日
  114. 羽生貴弘、鈴木大輔、望月明、夏井雅典、鬼沢直哉、杉林直彦、池田正二、遠藤哲郎、大野英男、 「不揮発ロジックインメモリアーキテクチャとその低電力VLSIシステムへの応用」、 集積回路研究会、松本市、2015年4月17日




  115. 2014年 (学術論文誌:19件;国際学会:21件;国内会議:9件。)



    学術論文誌


  116. K. Ito, S. Ohuchida and T. Endoh, "Dependence of Sub-Volume Excitation on Structural and Material Parameters in Precessional Regime of Spin Transfer Torque Magnetization Reversal", IEEE Transactions on Magnetics, Vol. 50, Issue 11, pp. 1402104 (4pages), November, 2014. [DOI: 10.1109/TMAG.2014.2323964]
  117. M. Natsui, D. Suzuki, N. Sakimura, R. Nebashi, Y. Tsuji, A. Morioka, T. Sugibayashi, S. Miura, H. Honjo, K. Kinoshita, S. Ikeda, T. Endoh, H. Ohno and T. Hanyu, "Nonvolatile Logic-in-Memory LSI Using Cycle-Based Power Gating and its Application to Motion-Vector Prediction", IEEE Journal of Solid-State Circuits (JSSC), Vol. 50, Issue 2, pp. 476-489, October 31, 2014. [DOI: 10.1109/JSSC.2014.2362853]
  118. H. Jarollahi, N. Onizawa, V. Gripon, N. Sakimura, T. Sugibayashi, T. Endoh, H. Ohno, T. Hanyu and W.J. Gross, "A Nonvolatile Associative Memory-Based Context-Driven Search Engine Using 90 nm CMOS/MTJ-Hybrid Logic-in-Memory Architecture", IEEE Journal on Emerging and Selected Topics in Circuits and Systems (JETCAS), Vol. 4, Issue 4, pp. 460 - 474, October 21, 2014. [DOI: 10.1109/JETCAS.2014.2361061]
  119. D. Kobayashi, Y. Kakehashi, K. Hirose, S. Onoda, T. Makino, T. Ohshima, S. Ikeda, M. Yamanouchi, H. Sato, E.C. Enobio, T. Endoh and H. Ohno, "Influence of Heavy Ion Irradiation on Perpendicular-Anisotropy CoFeB-MgO Magnetic Tunnel Junctions", IEEE Transactions on Nuclear Science, Vol. 61, Issue 4, pp. 1710-1716, August 2014. [DOI: 10.1109/TNS.2014.2304738]
  120. Daisuke Suzuki, Noboru Sakimura, Masanori Natsui, Akira Mochizuki, Tadahiko Sugibayashi, Tetsuo Endoh, Hideo Ohno and Takahiro Hanyu, "A compact low-power nonvolatile flip-flop using domain-wall-motion-device-based single-ended structure", IEICE Electronics Express, Vol. 11, No. 13, pp. 20140297, July 10, 2014. [DOI: 10.1587/elex.11.20140296]
  121. Soshi Sato, Yuki Hiroi, Kikuo Yamabe, Makoto Kitabatake, Tetsuo Endoh and Masaaki Niwa, "Multiple breakdown model of carpet-bombing-like concaves formed during dielectric breakdown of silicon carbide metal-oxide-semiconductor capacitors", Japanese Journal of Applied Physics(JJAP), Vol. 53, No. 8S1, pp. 08LA01 (4pages), March 2014. [DOI: 10.7567/JJAP.53.08LA01]
  122. Kazuki Itoh and Tetsuo Endoh, "A Novel Alternating Voltage Controlled Current Sensing Method for Suppressing Thermal Dependency", IEICE Transactions on Electronics, Vol. E97-C No.5 pp.431-437, May 2014. [URL]
  123. Satoru Tanoi and Tetsuo Endoh, "A High Output Resistance 1.2-V VDD Current Mirror with Deep Submicron Vertical MOSFETs", IEICE Transactions on Electronics, Vol. E97-C, No. 5, pp. 423-430, May 2014. [URL]
  124. Shoun Matsunaga, Akira Mochizuki, Noboru Sakimura, Ryusuke Nebashi, Tadahiko Sugibayashi, Tetsuo Endoh, Hideo Ohno and Takahiro Hanyu, "Complementary 5T-4MTJ nonvolatile TCAM cell circuit with phase-selective parallel writing scheme", IEICE Electronics Express, Vol. 11, No. 10 pp. 20140297, May 25, 2014. [DOI: 10.1587/elex.11.20140297]
  125. D. Suzuki, M. Natsui, A. Mochizuki, S. Miura, H. Honjo, K. Kinoshita, S. Fukami, H. Sato, S. Ikeda, T. Endoh, H. Ohno and T. Hanyu, "Design and fabrication of a perpendicular magnetic tunnel junction based nonvolatile programmable switch achieving 40% less area using shared-control transistor structure ", Journal of Applied Physics (JAP), Vol. 115, Issue 17, pp. 17B742 (3pages), May 2014. [DOI: 10.1063/1.4868332]
  126. Masakazu Muraguchi and Tetsuo Endoh, "Size dependence of electrostatic lens effect in vertical MOSFETs", Japanese Journal of Applied Physics(JJAP) , Vol. 53, No. 4S, pp. 04EJ09 (4pages), March 2014. [DOI: 10.7567/JJAP.53.04EJ09]
  127. Hiroki Koike, Takashi Ohsawa, Sadahiko Miura, Hiroaki Honjo, Shoji Ikeda, Takahiro Hanyu, Hideo Ohno and Tetsuo Endoh, " Wide operational margin capability of 1 kbit spin-transfer-torque memory array chip with 1-PMOS and 1-bottom-pin-magnetic-tunnel-junction type cell", Japanese Journal of Applied Physics(JJAP) , Vol. 53, No. 4S, pp. 04ED13 (7pages), March 2014.[DOI: 10.7567/JJAP.53.04ED13]
  128. Takeshi Sasaki、Masakazu Muraguchi、Moon-Sik Seo、Sung-kye Park and Tetsuo Endoh, "Effect with High Density Nano Dot Type Storage Layer Structure on 20nm Planar NAND Flash Memory Characteristics", Japanese Journal of Applied Physics(JJAP), Vol. 53, No. 4S, pp. 04ED17 (8pages), March, 2014.[DOI: 10.7567/JJAP.53.04ED17]
  129. J. H. Jeong, T. Endoh, Y. Kim, W. K. Kim and S. O. Park, "Influence of hydrogen patterning gas on electric and magnetic properties of perpendicular magnetic tunnel junctions", Journal of Applied Physics (JAP), Vol. 115, Issue 17, pp. 17C727 (3pages), February 2014. [DOI: 10.1063/1.4866395]
  130. Takuya Imamoto and Tetsuo Endoh, "Excellent Scalability Including Self-Heating Phenomena of Vertical-Channel Field-Effect-Diode Type Capacitor-less One Transistor Dynamic Random Access Memory Cell", Japanese Journal of Applied Physics(JJAP) , Vol. 53, No. 4S, pp. 04ED05 (8pages), February 2014.[DOI: 10.7567/JJAP.53.04ED05]
  131. T. Ohsawa, S. Ikeda, T. Hanyu, H. Ohno and T. Endoh, "Trend of tunnel magnetoresistance and variation in threshold voltage for keeping data load robustness of metal-oxide-semiconductor/magnetic tunnel junction hybrid latches", Journal of Applied Physics (JAP), Vol. 115, Issue 17, pp. 17C728 (3pages), February 2014. [DOI: 10.1063/1.4867129]
  132. Takashi Ohsawa, Shoji Ikeda, Takahiro Hanyu, Hideo Ohno and Testuo Endoh, "Power Reduction by Power Gating in Differential Pair Type STT-MRAMs for Low-Power Nonvolatile Cache Memories", Japanese Journal of Applied Physics(JJAP) , Vol. 53, No. 4S, pp. 04ED04 (8pages), February 2014. [DOI: 10.7567/JJAP.53.04ED04]
  133. Takashi Ohsawa, Shoji Ikeda, Takahiro Hanyu, Hideo Ohno and Testuo Endoh, "A Two-Transistor Bootstrap Type Selective Device for Spin-Transfer-Torque Magnetic Tunnel Junctions", Japanese Journal of Applied Physics(JJAP) , Vol. 53, No. 4S, pp. 04ED03 (6pages), February 2014.[DOI: 10.7567/JJAP.53.04ED03]
  134. Shoun Matsunaga, Akira Mochizuki, Tetsuo Endoh, Hideo Ohno and Takahiro Hanyu,"Design of an energy-efficient 2T-2MTJ nonvolatile TCAM based on a parallel-serial-combined search scheme", IEICE Electronics Express, Vol. 11, No. 3, pp. 20131006, February, 2014. [DOI: 10.1587/elex.11.20131006]


  135. 国際学会


  136. S. Ikeda, H. Sato1,2, H. Honjo, E. C. I. Enobio, S. Ishikawa, M. Yamanouchi, S. Fukami, S. Kanai, F. Matsukura, T. Endoh and H. Ohno, "Perpendicular-anisotropy CoFeB-MgO based magnetic tunnel junctions scaling down to 1X nm", IEEE International Electron Devices Meeting (IEDM), pp. 796-799, San Francisco, CA, USA, December 15-17, 2014. [DOI: 10.1109/IEDM.2014.7047160]
  137. Takahiro Hanyu, Daisuke Suzuki, Akira Mochizuki, Masanori Natsui, Naoya Onizawa, Tadahiko Sugibayashi, Shoji Ikeda, Tetsuo Endoh, and Hideo Ohno, "Challenge of MOS/MTJ-Hybrid Nonvolatile Logic-in-Memory Architecture in Dark-Silicon Era", IEEE International Electron Devices Meeting (IEDM), pp. 654-656, San Francisco, CA, USA, December 15-17, 2014. [DOI: 10.1109/IEDM.2014.7047124]
  138. Tetsuo Endoh, "STT-MRAM, NV-logic with MTJ and high density memory with Vertical MOSFET ", SEMATECH Beyond CMOS Workshop Materials & Technologies for Beyond CMOS, Marriott Union Square, San Francisco, USA, December 14, 2014.
  139. 6. S. Ohuchida, K. Ito, M. Muraguchi and T. Endoh, "The dynamic interaction effect due to oscillatory stray field from programing cell in 10nm design p-MTJ array", 59th Annual Magnetism & Magnetic Materials Conference(MMM), FE-10, Honolulu, Hawaii, USA, Nov 3-7, 2014.
  140. T. Ohsawa, S. Miura, H. Honjo, S. Ikeda, T. Hanyu, H. Ohno and T. Endoh, "A 500ps/8.5ns Array Read/Write Latency 1Mb Twin 1T1MTJ STT-MRAM designed in 90nm CMOS/40nm MTJ Process with Novel Positive Feedback S/A Circuit", International Conference on Solid State Dvices and Materails (SSDM), A-8-3, Tsukuba International Congress Center, Tsukuba, Ibaraki, Japan, September 9-11, 2014.
  141. S. Ohuchida, K. Ito and T. Endoh, "Impact of Sub-Volume Excitation for Improving Overdrive Delay Product in Sub-40nm p-MTJ and Its Beyond", A-8-2, Tsukuba International Congress Center, Tsukuba, Ibaraki, Japan, September 9-11, 2014.
  142. T. Imamoto and T. Endoh, "Ultra Low-Frequency Noise in Vertical MOSFETs Having Tunable Threshold Voltage Fabricated with 60nm CMOS Technology on 300nm Wafer Process", International Conference on Solid State Dvices and Materails (SSDM), J-7-1, Tsukuba International Congress Center, Tsukuba, Ibaraki, Japan, September 9-11, 2014.
  143. H. Koike, T. Ohsawa, S. Miura, H. Honjo, K, Kinoshita, S. Ikeda, T. Hanyu, H. Ohno and T. Endoh, "A Power-gated 32bit MPU with a Power Controller Circuit Activated by Deep-sleep-mode Instraction Achieving Ultra-low Power Operation", International Conference on Solid State Dvices and Materails (SSDM), A-7-1, Tsukuba International Congress Center, Tsukuba, Ibaraki, Japan, September 9-11, 2014.
  144. J.H. Jeong and T. Endoh, "Study about the Process Damage Mechanism of the Patterned Interface Perpendicular Magnetic Tunnel Junctions (MTJs) by Hydrogen Ion Treatments", International Conference on Solid State Dvices and Materails (SSDM), A-6-4, Tsukuba International Congress Center, Tsukuba, Ibaraki, Japan, September 9-11, 2014.
  145. S. Miura, H. Honjo, K. Kinoshita, K. Tokutome, H, Koike, S. Ikeda, T. Endoh and H. Ohno, "Properties of Perpendicular-Anisotrapy Magnetic Tunnel Junctions Fabricated over the Cu Via", International Conference on Solid State Dvices and Materails (SSDM), A-6-3, Tsukuba International Congress Center, Tsukuba, Ibaraki, Japan, September 9-11, 2014.
  146. K. Ito, S. Ohuchida and T. Endoh, "LLG Micromagnetic Simulation on STT Efficiency of sub 30nm Perpendicular MTJs with Etching Damage", International Conference on Solid State Dvices and Materails (SSDM), PS-12-11, Tsukuba International Congress Center, Tsukuba, Ibaraki, Japan, September 9-11, 2014.
  147. Tetsuo Endoh, "STT-MRAM Technology and Its NV-Logic Applications for Ultimate Power Management", CMOS Emerging Technologies Research, MINATEC, France, July 8 2014.
  148. S. Tanoi and T. Endoh, "A High-frequency Level-up Shifter Based on 0.18um Vertical MOSFETs with More than 70% Reduction of Overshoot-voltage Above VDD", International Conference on Solid State Dvices and Materails (SSDM), PS-5-8, Tsukuba International Congress Center, Tsukuba, Ibaraki, Japan, September 9-11, 2014.
  149. Hiroaki Ohtsuka, Masakazu Muraguchi, Yitao Ma and Tetsuo Endoh, "Output voltage stability of SPMC Type AC-AC converter for power management in IT system", 2014 IEEE International Meeting for Future of Electron Devices, Kansai (IMFEDK), pp. 1-2, Kyoto, Japan, June 19-20, 2014. [DOI: 10.1109/IMFEDK.2014.6867096]
  150. R. Nebashi, N. Sakimura, H. Honjo, A. Morioka, Y. Tsuji, K. Ishihara, K. Tokutome, S. Miura, S. Fukami, K. Kinoshita, T. Hanyu, T. Endoh, N. Kasai, H. Ohno and T. Sugibayashi, "A delay circuit with 4-terminal magnetic-random-access-memory device for power-efficient time- domain signal processing", 2014 IEEE International Symposium on Circuits and Systems (ISCAS), pp. 1588-1591, Melboume VIC, June 1-5, 2014. [DOI: 10.1109/ISCAS.2014.6865453]
  151. Tetsuo Endoh, "Spintronics-based Nonvolatile Computers", 2014 Spintronics Workshop on LSI, Hilton Hawaiian Village, Honolulu, USA, June 13, 2014.    
  152. T. Ohsawa, S. Ikeda, T. Hanyu, H. Ohno and T. Endoh, "Studies on read-stability and write-ability of fast access STT-MRAMs", 2014 International Symposium on VLSI Technology, Systems and Application (VLSI-TSA), pp. 1-2, Hshichu, China, April 28-30, 2014. [DOI: 10.1109/VLSI-TSA.2014.6839665]
  153. Tetsuo Endoh, "Embedded STT-MRAM", 1st International Workshop on Data-Abundant System Technology, Stanford University, California, USA, April 22-23, 2014.
  154. Tetsuo Endoh, "Spintronics-based Nonvolatile Computing Systems", The 3nd CSIS International Symposium on Spintronics for Integrated Crictuit Applications and Beyond, T4, Tokyo International Forum, Hall D7, March 13, 2014.
  155. Noboru Sakimura, Yukihide Tsuji, Ryusuke Nebashi, Hiroaki Honjo, Ayuka Morioka, Kunihiko Ishihara, Keizo Kinoshita, Shunsuke Fukami, Sadahiko Miura, Naoki Kasai, Tetsuo Endoh, Hideo Ohno, Takahiro Hanyu, and Tadahiko Sugibayashi, "A 90-nm 20-MHz Fully Nonvolatile Microcontroller for Standby-Power Critical Applications", IEEE International Solid-State Circuits Conference (ISSCC2014), pp. 184 - 185, San Francisco, CA, USA, February 9-13, 2014. [DOI: 10.1109/ISSCC.2014.6757392]
  156. Tetsuo Endoh, "STT-MRAM and NV-Logic for Low Power Systems", SEMICON Korea 2014, COEX Korea Exhibition Center, Seoul, Korea, February 12-14, 2014.


  157. 国内会議


  158. 遠藤哲郎,「集積エレクトロニクスの世界的拠点を目指した国際産学連携研究」, 東北大学イノベーションフェア, 仙台、2013年1月17日.
  159. 遠藤哲郎,「STT-MRAMおよび不揮発性ロジックの現状と将来展望」, 第75回応用物理学会秋季学術講演会, 北海道大学, 札幌, 日本, 2014年9月18日.
  160. 小池洋紀, 大澤隆, 池田正二, 羽生貴弘, 大野英男, 遠藤哲郎, “磁気ランダムアクセスメモリ(MRAM)の最新技術動向,” 電子情報通信学会2014年ソサイエティ大会 エレクトロニクス講演論文集2, 講演番号 CT-1-3, pp. SS-6-9, 2014年9月.
  161. 遠藤哲郎, 「東北大学国際集積エレクトロニクス研究開発センターの始動と今後の半導体技術の展望」, 半導体関連産業ものづくり基盤集積セミナー, TKPガーデンシティ仙台, 仙台, 2014年3月20日.
  162. 松永翔雲, 崎村昇, 根橋竜介, 杉林直彦(NEC)・夏井雅典, 望月明, 遠藤哲郎, 大野英男, 羽生貴弘, "全文検索システム向け階層的パワーゲーティングを活用した低エネルギー不揮発TCAMエンジンチップ ",信学技報, vol. 114, no. 13, ICD2014-8, pp. 39-44, 機械振興会館, 東京, 2014年4月17-18日.
  163. 小池洋紀, 崎村昇, 根橋竜介, 辻幸秀, 森岡あゆ香, 三浦貞彦, 本庄弘明, 杉林直彦, 大澤隆, 池田正二, 羽生貴弘, 大野英男, 遠藤哲郎, “MTJベース不揮発フリップフロップを用いた3μsec-Entry/Exit 遅延時間のマイクロプロセッサ,”信学技報 , vol. 114, no. 13, ICD2014-17, pp. 85-90, 機械振興会館, 東京, 2014年4月17-18日.
  164. 大澤隆, 小池洋紀, 三浦貞彦, 木下啓藏, 本庄弘明, 池田正二, 羽生貴弘, 大野英男, 遠藤哲郎, “1.5ns/2.1nsのランダム読出/書込サイクル時間を達成した不揮発性混載メモリ用1Mb STT-MRAM -6T2MTJセルにバックグラウンド書き込み(BGW)方式を適用,” 信学技報, vol. 114, no. 13, ICD2014-7, pp. 33-38, 機械振興会館, 東京, 2014年4月17-18日.
  165. 遠藤哲郎. 「東北大学国際集積エレクトロニクス研究開発センターの始動と今後の半導体技術の展望」, ものづくり基盤集積セミナー, AER30FホールC, TKPガーデンシティ仙台, 仙台, 2014年3月20日.
  166. 遠藤哲郎. 「3次元構造デバイスとスピン/CMOS融合デバイスが切り拓く集積エレクトロニクスの将来」, 2014つくばナノテク拠点シンポジウム, 東京国際フォーラム, 東京, 2014年3月6日.



  167. 2013年 (学術論文誌:10件;国際学会:55件;国内会議:18件。)



    学術論文誌


  168. Daisuke Suzuki, Masanori Natsui, Akira Mochizuki, Sadahiko Miura, Hiroaki Honjo, Keizo Kinoshita, Hideo Sato, Shoji Ikeda, Tetsuo Endoh, Hideo Ohno and Takahiro Hanyu, "Fabrication of a magnetic tunnel junction-based 240-tile nonvolatile field-programmable gate array chip skipping wasted write operations for greedy power-reduced logic applications", Vol. 10, No. 23, pp. 20130772, December 10, 2013.[DOI: 10.1587/elex.10.20130772]
  169. 大野 英男 , 遠藤 哲郎 , 羽生 貴弘 [他] , 安藤 康夫 , 笠井 直記 , 池田 正二, 「スピントロニクスを用いた集積回路と省エネ社会への貢献」(<特別小特集>東北から明るい未来を創るICT技術)、電子情報通信学会誌、巻:96, 号: 10, ページ: 771-775, 2013年10月1日.[URL]
  170. H. Toyota, A. Okabe, T. Endoh, Y. Jinbo, N. Uchitomi, “Study of Sb template for heteroepitaxial growth of GaSb thin film on Si(111) substrate”, Journal of Crystal Growth, Vol. 378, pp: 129-133, September 2013.[DOI: 10.1109/JSSC.2013.2253412]
  171. Takashi Ohsawa, Hiroki Koike, Sadahiko Miura, Hiroaki Honjou, Keizo Kinoshita, Shoji Ikeda, Takahiro Hanyu, Hideo Ohno and Tetuso Endoh, “A 1Mb nonvolatile embedded memory using 4T2MTJ cell with 32b fine-grained power gating scheme,” IEEE Journal of Solid-State Circuits (JSSC), VOL. 48, NO. 6, pp: 1511-1520, June 2013.[DOI: 10.1109/JSSC.2013.2253412]
  172. Tetsuo Endoh, “FOREWORD: Special Section on Fundamentals and Applications of Advanced Semiconductor Devices”, IEICE Transactions on Electronics, Vol. E96C, No. 5, pp: 619-619, May2013.[URL]
  173. Hyoungjun Na and Tetsuo Endoh, “A High Performance Current Latch Sense Amplifier with Vertical MOSFET,” IEICE Transactions on Electronics, Vol.E96-C, No.5, pp.655-662, May 2013.[URL]
  174. Takuya Imamoto and Tetsuo Endoh, “Novel Field Effect Diode Type Vertical Capacitorless One Transistor Dynamic Random Access Memory Cell with Negative Hold Bit Line Bias Scheme for Improving the Hold Characteristics,” Japanese Journal of Applied Physics (JJAP), Vol.52, No. 4, Issue 2, pp: 04CD08(5pages), April 2013.[DOI: 10.7567/JJAP.52.04CD08]
  175. Hyoungjun Na and Tetsuo Endoh, “A Multi-pillar Vertical Metal-oxide-semiconductor Field-effect Transistor Type Dynamic Random Access Memory Core Circuit for Sub-1 V Core Voltage Operation without Overdrive Technique,” Japanese Journal of Applied Physics (JJAP), Vol.52 No.4. , 04CE08 (8 pages), April 2013.[DOI: 10.7567/JJAP.52.04CE08]
  176. Taro Shiokawa, Genki Fujita, Yukihiro Takada, Satoru Konabe, Masakazu Muraguchi, Takahiro Yamamoto, Tetsuo Endoh, Yasuhiro Hatsugai, and Kenji Shiraishi,"Influence of Coulomb Blockade on Wave Packet Dynamics in Nanoscale Structures", Japanese Journal of Applied Physics (JJAP), Vol. 52, pp.04CJ06 (4 pages), March 2013.[DOI: 10.7567/JJAP.52.04CJ06]
  177. Satoru Tanoi, Tetsuo Endoh, “A 3-mW/Gbps 1.8-V Operated Current-Reuse Low-Voltage Differential Signaling Driver Using Vertical Metal?Oxide?Semiconductor Field-Effect Transistors,” Japanese Journal of Applied Physics (JJAP), Vol.52 No.4. pp. 04CE03 (7 pages), February 2013.[DOI: 10.7567/JJAP.52.04CE03]


  178. 国際学会


  179. Tetsuo Endoh, "Is there life beyond conventional CMOS? ", IEEE International Electron Devices Meeting (IEDM), [Panel], Washington, DC, USA, December 10, 2013.
  180. Tetsuo Endoh, "STT-MRAM and its NV-Logic applications for Ultimate Power Management", SEMATECH-imec workshop "Beyond CMOS", Fairfax Hotel, Washington D.C., USA, December 8, 2013.
  181. Taro Shiokawa, Genki Fujita, Yukihiro Takada, Satoru Konabe, Masakazu Muraguchi, Takahiro Yamamoto, Tetsuo Endoh, Yasuhiro Hatsugai, and Kenji Shiraishi, “Multi-Electron Wave Packets Dynamics under MOSFET-like Potentials”, ISANN 2013 International Symposium on Advanced Nanodevices and Nanotechnology, Thu1-2, Kauai , USA, December 8-13, 2013.
  182. G. Fujita, T. Shiokawa, Y. Takada, S. Konabe, M. Muraguchi, T. Yamamoto, T. Endoh, Y. Hatsugai and K. Shiraishi, “Effect of Electric Field in Multi-Electron Wave Packet Dynamics in Channel of Nanoscale devices”, ISANN 2013 International Symposium on Advanced Nanodevices and Nanotechnology, PII-4, Kauai , USA, December 8-13, 2013.
  183. T. Shiokawa, G. Fujita, Y. Takada, S. Konabe, M. Muraguchi, T. Yamamoto, T. Endoh, Y. Hatsugai and K. Shiraishi, “Coulomb Interaction on Multi-electron Wave Packet Dynamics in Nanoscale channels”, 44th IEEE Semiconductor Interface Specialists Conference (SISC), 11.12, Arlington VA, USA, December 5-7, 2013.
  184. D. Suzuki, M. Natsui, A. Mochizuki, S. Miura, H. Honjo, K. Kinoshita, H. Sato, S. Fukami, S. Ikeda, T. Endoh, H. Ohno and T. Hanyu, "Fabrication of a Perpendicular-MTJ-Based Compact Nonvolatile Programmable Switch Using Shared-Write-Control-Transistor Structure", The 58th Annual Magnetism and Magnetic Materials Conference (MMM2013), CD-05, pp. 233, Denver, Colorado, USA, November 4-8, 2013. [URL]
  185. J. Jeong, Y. Kim, W. Kim, S. Park and T. Endoh, "Influence of hydrogen patterning gas on eletric and magnetic properties of perpendicular MTJs", The 58th Annual Magnetism and Magnetic Materials Conference (MMM2013), BS-07, pp. 185, Denver, Colorado, USA, November 4-8, 2013. [URL]
  186. Takashi Ohsawa, Shoji Ikeda, Takahiro Hanyu, Hideo Ohno, and Tetsuo Endoh, "Trend of TMR and Variation in Vth for Keeping Data Load Robustness of MOS/MTJ Hybrid Latches", The 58th Annual Magnetism and Magnetic Materials Conference (MMM2013), GT-10, pp. 693, Denver, Colorado, USA, November 4-8, 2013. [URL]
  187. Hiroki Koike, Takashi Ohsawa, ,Katsuya Miura, Hiroaki Honjo, Shoji Ikeda, Takahiro Hanyu, Hideo Ohno, and Tetsuo Endoh, "MTJ Resistance Distribution of 1-kbit 1T-1MTJ STT-MRAM Cell Arrays Fabricated on a 300-mm Wafer", The 58th Annual Magnetism and Magnetic Materials Conference (MMM2013), DC-01, pp. 324, Denver, Colorado, USA, November 4-8, 2013. [URL]
  188. Hiroki Koike,Takashi Ohsawa, Noboru Sakimura, Ryusuke Nebashi, Yukihide Tsuji, Ayuka Morioka, Katsuya Miura, Hiroaki Honjo, Tadahiko Sugibayashi, Shoji Ikeda, Takahiro Hanyu, Hideo Ohno and Tetsuo Endoh, "A Power-Gated MPU with 3-microsecond Entry/Exit Delay using MTJ-Based Nonvolatile Flip-Flop", IEEE Asian Solid-State Circuits Conference (ASSCC2013), pp. 317-320, Singapore, November 11-13, 2013. [DOI: 10.1109/ASSCC.2013.6691046] -->
  189. Tetsuo Endoh, "STT-MRAM and NV-Logic for Low Power Systems", 26th International Microprocesses and Nanotechnology Conference (MNC 2013), 6A-1-2, (Plenary), Royton Sapporo, Hokkaido, Japan, November 5-8, 2013.
  190. Tetsuo Endoh, "STT-MRAM and Nonvolatile Logic", 3rd IMEC-Stanford International Workshop on Resistive Memories, International Microelectronics Centre (IMEC), Belgium, October 17-18, 2013. , October 17-18, 2013.
  191. Tetsuo Endoh, "STT-MRAM and NV-Logic for Low Power Systems", 2013 Third Berkeley Symposium on Energy Efficient Electronic Systems (E3S), pp. 1 - 2, Berkeley, CA, USA, October 28-29, 2013. [DOI: 10.1109/E3S.2013.6705864 ]
  192. Takeshi Sasaki and Tetsuo Endoh, “Gate Length Scaling of High-k Vertical MOSFET toward 20nm CMOS Technology and beyond”, IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference, pp. 121-122, Hyatt Regency Monterey Hotel and Spa, Monterey, California, October 7-10, 2013. [DOI: 10.1109/S3S.2013.6716557]
  193. Takuya Imamoto and Tetsuo Endoh, “Suppression of Self-Heating Effect Employing Bulk Vertical-Channel Bipolar Junction Transistor (BJT) Type Capacitorless 1T-DRAM Cell”, IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference, pp. 140-141, Hyatt Regency Monterey Hotel and Spa, Monterey, California, October 7-10, 2013. [DOI: 10.1109/S3S.2013.6716574]
  194. G. Fujita, T. Shiokawa, Y. Takada, S. Konabe, M. Muraguchi,T. Yamamoto, T. Endoh, Y. Hatsugai and K. Shiraishi, "Dynamical Coulomb Blockade in Multi-Electron Wave Packet Dynamics in Nanostructures", 2013 International Conference on Solid State Devices and Materials (SSDM), E-2-4, pp. 760-761, Fukuoka Japan, September 24-27, 2013.
  195. T. Shiokawa, G. Fujita, Y. Takada, S. Konabe, M. Muraguchi, T. Yamamoto, T. Endoh, Y. Hatsugai and K. Shiraishi, "Multi-electron Wave Packet Transport Dynamics in Nanoscale Channel", 2013 International Conference on Solid State Devices and Materials (SSDM), D-3-3, pp. 718-719, Fukuoka Japan, September 24-27, 2013.
  196. R. Nebashi, Y. Tsuji, H. Honjo, N. Sakimura, A. Morioka, K. Tokutome, S. Miura, S. Fukami, M. Yamanouchi, K. Kinoshita, T. Hanyu, T. Endoh, N. Kasai, H. Ohno, and T. Sugibayashi, "Demonstration of a Nonvolatile Processor Core Chip with Software-Controlled Three-Terminal MRAM Cells for Standby-Power Critical Applications", 2013 International Conference on Solid State Devices and Materials (SSDM), M-8-3, pp. 1102-1103, Fukuoka Japan, September 24-27, 2013.
  197. S. Miura, H. Honjo, K. Kinoshita, K. Tokutome, N. Kasai, S. Ikeda, T. Endoh and H. Ohno, "Properties of perpendicular-anisotropy magnetic tunnel junctions prepared by different MTJ etching process", 2013 International Conference on Solid State Devices and Materials (SSDM), PS-12-11, pp. 396-397, Fukuoka Japan, September 24-27, 2013.
  198. Takashi Ohsawa, Shoji Ikeda, Takahiro Hanyu, Hideo Ohno and Tetuso Endoh, "Strategy of STT-MRAM Cell Design and Its Power Gating Technique for Low-Voltage and Low-Power Cache Memories", 2013 International Conference on Solid State Devices and Materials (SSDM), M-7-1, pp. 1090-1091, Fukuoka Japan, September 24-27, 2013.
  199. Takashi Ohsawa, Shoji Ikeda, Takahiro Hanyu, Hideo Ohno and Tetuso Endoh, "Studies on Selective Devices for Spin-Transfer-Torque Magnetic Tunnel Junctions", 2013 International Conference on Solid State Devices and Materials (SSDM), M-8-4, pp. 1104-1105, Fukuoka Japan, September 24-27, 2013.
  200. Takashi Ohsawa, Sadahiro Miura, Hiroaki Honjo, Keizo Kinoshita, Shoji Ikeda, Takahiro Hanyu, Hideo Ohno and Tetuso Endoh, "A 4x4 Nonvolatile Multiplier Using Novel MTJ-CMOS Hybrid Latch and Flip-Flop", 2013 International Conference on Solid State Devices and Materials (SSDM), M-6-3, pp. 1086-1087, Fukuoka Japan, September 24-27, 2013.
  201. Hiroki Koike, Takashi Ohsawa, Sadahiro Miura, Hiroaki Honjo, Shoji Ikeda, Takahiro Hanyu, Hideo Ohno and Tetuso Endoh, "Evaluation of PMOS type 1T-1MTJ STT-MRAM cell using 1kbit memory array test chips", 2013 International Conference on Solid State Devices and Materials (SSDM), pp. ,Fukuoka Japan, September 24-27, 2013.
  202. Masakazu Muraguchi and Tetsuo Endoh, "Size Dependence of Electrostatic Lens Effect in Vertical Pillar Type MOSFET", 2013 International Conference on Solid State Devices and Materials (SSDM), E-2-3, pp. 758-759, Fukuoka Japan, September 24-27, 2013.
  203. Takuya Imamoto and Tetsuo Endoh, "Excellent Scalability Including Self-Heating Phenomena of Vertical-Channel Field-Effect-Diode (FED) Type Capacitorless One Transistor DRAM Cell", 2013 International Conference on Solid State Devices and Materials (SSDM), pp. ,Fukuoka Japan, September 24-27, 2013.
  204. Anyang Wang and Tetsuo Endoh, "Layout Design Considering Electro-thermal Properties for CMOS Inverter Composed of Multi-pillar Vertical MOSFET", 2013 International Conference on Solid State Devices and Materials (SSDM), PS-3-16, pp. 86-87, Fukuoka Japan, September 24-27, 2013.
  205. Takeshi Sasaki , Masakazu Muraguchi, Moon-Sik Seo, Sung-Kye Park and Tetsuo Endoh, “Effect with Nano Dot Type Storage Layer Structure on Channel Region in 20nm Planar NAND Flash Memory Cell,” International Conference on Solid State Devices and Materials (SSDM), PS-4-5, pp.:112-113, Fukuoka Japan, September 24-27, 2013.
  206. Tetsuo Endoh "Impact of 3D structured Memory and Spintronics based NV-Memory for High Performance & Low Power Systems", International Conference on Solid State Devices and Materials (SSDM), Short Course, Fukuoka, Japan, Sep. 24, 2013.
  207. Tetsuo Endoh, "Spintronics Based NV-Memory/Logic for Low Power Systems", Non-Volatile Memory Technology Symposium (NVMTS), Minneapolis, MN, USA, Aug. 14, 2013.
  208. Shoun Matsunaga, Noboru Sakimura, Ryusuke Nebashi, Yukihide Tsuji, Ayuka Morioka, Tadahiko Sugibayashi, Katsuya Miura, Hiroaki Honjo,, K. Kinoshita, H. Sato, S. Fukami, M. Natsui, A. Mochizuki, Shoji Ikeda, Tetsuo Endoh , Hideo Ohno and Takahiro Hanyu, "Fabrication of a 99%-energy-less nonvolatile multi-functional CAM chip using hierarchical power gating for a massively-parallel full-text-search engine", 2013 Symposium on VLSI Circuits (VLSIC)/2013 Symposium on VLSI Technology (VLSIT) Digest of Technical Papers, pp. C106 - C107 , Kyoto, Japan, June 12-14, 2013. [URL]
  209. Tetsuo Endoh, “Spintronics Based NV-Memory/Logic for High Performance & Low Power Systems”, 2013 Symposium on VLSI Circuits (VLSIC)/2013 Symposium on VLSI Technology (VLSIT) Digest of Technical Papers, Short Course, Kyoto, Japan, June 12-14, 2013.
  210. Tetsuo Endoh, “Innovative Si-based integrated electronic systems”, 2013 Asia-Pacific Workshop on Fundamentals and Applications of Advanced Semiconductor Devices (AWAD), 4A-2, pp: 155-161, Seoul, Korea, June, 2013.
  211. Takashi Ohsawa, Sadahiro Miura, Keizo Kinoshita, Hiroaki Honjo, Shoji Ikeda, Takahiro Hanyu, Hideo Ohno and Tetuso Endoh, “A 1.5nsec/2.1nsec random read/write cycle 1Mb STT-RAM using 6T2MTJ cell with background write for nonvolatile e-memories,” 2013 Symposium on VLSI Circuits (VLSIC)/2013 Symposium on VLSI Technology (VLSIT) Digest of Technical Papers, pp. C110-C111, Kyoto, Japan, June 12-14, 2013. [URL]
  212. Takuya Imamoto and Tetsuo Endoh, “Impact of Tapered Silicon Channel on the Asymmetric I-V Characteristics of nanoscale Double Gate MOSFETs,” 2013 Asia-Pacific Workshop on Fundamentals and Applications of Advanced Semiconductor Devices (AWAD), pp: 211-215, Seoul, Korea, June 26-28, 2013.
  213. Anyang Wang and Tetsuo Endoh, “Analyzing Self-Heating Effect in CMOS Inverter of Vertical MOSFET,” 2013 Asia-Pacific Workshop on Fundamentals and Applications of Advanced Semiconductor Devices (AWAD), pp: 166-170, Seoul, Korea, June 26-28, 2013.
  214. Yijie Xiong, Yitao Ma and Tetsuo Endoh, “A Nonlinear Multidimensional-Vector-Adaptive Core Circuit For High-Speed Low-Power Flexible Pattern Matching,” 2013 Asia-Pacific Workshop on Fundamentals and Applications of Advanced Semiconductor Devices (AWAD), pp: 293-297, Seoul, Korea, June 26-28, 2013.
  215. Satoshi Ohuchida and Tetsuo Endoh, “A Study of Time-Resolved Switching Characteristic in Perpendicular Magnetic Tunnel Junction,” 2013 Asia-Pacific Workshop on Fundamentals and Applications of Advanced Semiconductor Devices (AWAD), 4B-4, pp: 193-198, Seoul, Korea, June 26-28, 2013.
  216. Kazuki Itoh and Tetsuo Endoh, “A Novel Alternating Voltage Controlled Current Sensing Method for Suppressing Thermal Dependency,” 2013 Asia-Pacific Workshop on Fundamentals and Applications of Advanced Semiconductor Devices (AWAD), 7B-3, pp: 288-292, Seoul, Korea, June 26-28, 2013.
  217. Satoru Tanoi and Tetsuo Endoh, “A low voltage operated current mirror for analog designs with deep submicron vertical MOSFETs,” 2013 Asia-Pacific Workshop on Fundamentals and Applications of Advanced Semiconductor Devices (AWAD), pp: 233-237, Seoul, Korea, June 26-28, 2013.
  218. Yasuhiro Yoshida, Hiroki Koike, Masakazu Muraguchi , Shoji Ikeda, Takahiro Hanyu, Hideo Ohno and Tetuso Endoh, “A Model Reflecting Preheat Effect by Two-step Writing Technique for High Speed and Stable STT-MRAM,” 16th International Workshop on Computational Electronics (IWCE), pp: 248-249, Nara, Japan, June 4-7, 2013. [URL]
  219. Hiroki Koike, Takashi Ohsawa and Tetsuo Endoh, “Verification of Simulation Time Improvement for SPICE Simulator Using Built-in MTJ Model,” 16th International Workshop on Computational Electronics (IWCE), pp: 246-247, Nara, Japan, June 4-7, 2013. [URL]
  220. Akihiro Itagaki, Masakazu Muraguchi and Tetsuo Endoh, “Intrinsic Region Length Dependence of Vertical Double Gate IMOS,” 16th International Workshop on Computational Electronics (IWCE), pp: 190-191, Nara, Japan, June 4-7, 2013. [URL]
  221. Takeshi Sasaki and Tetsuo Endoh, “Gate Leakage Reduction of Vertical MOSFET with High-k Dielectric Film Employing Gate Dielectric Capacitance Oriented Design,” 16th International Workshop on Computational Electronics (IWCE), pp: 188-189, Nara, Japan, June 4-7, 2013. [URL]
  222. Anyang Wang and Tetsuo Endoh,“Reduction of Self-Heating Effect in CMOS Inverter of Vertical MOSFET by Common-Gate Layout,” 16th International Workshop on Computational Electronics (IWCE), pp: 140-141, Nara, Japan, June 4-7, 2013. [URL]
  223. Takuya Imamoto and Tetsuo Endoh, “Improvement of Self-Heating Effect Employing Vertical-Channel Field-Effect-Diode 1T-DRAM,” 16th International Workshop on Computational Electronics (IWCE), pp: 102-103, Nara, Japan, June 4-7, 2013. [URL]
  224. Takashi Ohsawa,Hiroki Koike, Takahiro Hanyu, Hideo Ohno and Tetuso Endoh, “A 1Mb STT-MRAM with Zero Array Standby Power and 1.5ns Quick Wake-up by 8b Fine-Grained Power Gating,” 5th IEEE International Memory Workshop (IMW), pp. 80-83, Monterey, CA, USA, May 26-28, 2013. [DOI: 10.1109/IMW.2013.6582103 ]
  225. Yitao Ma, Tadashi Shibata and Tetsuo Endoh, “An MTJ-Based Nonvolatile Associative Memory Architecture With Intelligent Power-Saving Scheme for High-Speed Low-Power Recognition Applications”, IEEE International Symposium on Circuits and Systems (ISCAS), pp: 1248-1251, Beijing, China, May 19-23, 2013. [DOI: 10.1109/ISCAS.2013.6572079]
  226. Tetsuo Endoh, “MRAM/STTRAM/TA-MRAM which ones first? For which applications? Which challenges still on the way?”, International Memory Workshop 2013, Monterey, California, May 2013.
  227. Tetsuo Endoh, “Current Status of NAND Memories and Its Future Prospect with 3D NAND Technology”, MRS Spring Meeting, San Francisco, California, April 2013.
  228. Yijie, Xiong, Yitao, Ma, and Tetsuo. Endoh, “A Flexible Adaptive Matching Cell Circuit with Bell-Shaped Similarity Evaluation Function for High-Speed Low-Power Nonlinear Pattern Recognition Systems”, 2013 International Workshop on Nonlinear Circuits, Communications and Signal Processing (NCSP), pp:624-627, Isrand of Hawaii, Hawaii, USA., March 4-7, 2013.
  229. Masanori Natsui, Daisuke Suzuki, Noboru Sakimura, Ryusuke Nebashi, Yukihide Tsuji, Ayuka Morioka, Tadahiko Sugibayashi, Sadahiko Miura, Hiroaki Honjo, Keizo Kinoshita, Shoji Ikeda, Tetsuo Endoh, Hideo Ohno, and Takahiro Hanyu, “Nonvolatile Logic-in-Memory Array Processor in 90nm MTJ/MOS Achieving 75% Leakage Reduction Using Cycle-Based Power Gating,” 2013 IEEE International Solid-State Circuits Conference Digest of Technical Papers (ISSCC), pp.194-195, San Francisco, CA, USA, February 9-13, 2013.[DOI: 10.1109/ISSCC.2013.6487696]
  230. Fumitaka Iga, Takashi Ohsawa, Shoji Ikeda, Takahiro Hanyu, Hideo Ohno, and Tetsuo Endoh, "Two-step writing method for STT-MTJ to improve switching probability and write-speed", The 3rd CSIS International Symposium on Spintronics-based VLSIs, Sendai, Japan, Jan. 31, 2013.
  231. Takashi Ohsawa, Hiroki Koike, Sadahiko Miura, Hiroaki Honjo, Keiichi Tokutome, Shoji Ikeda, Takahiro Hanyu, Hideo Ohno, and Tetsuo Endoh, "A fine-grained power gating architecture for MTJ-based embedded memories", The 3rd CSIS International Symposium on Spintronics-based VLSIs, Sendai, Japan, Jan. 31, 2013.
  232. Hiroki Koike, Takashi Ohsawa, and Tetsuo Endoh, "A New Sensing Scheme with High Signal Margin Suitable for Spin-Transfer Torque RAM", The 3rd CSIS International Symposium on Spintronics-based VLSIs, Sendai, Japan, Jan. 31, 2013.
  233. Tetsuo Endoh, Shuta Togashi, Fumitaka Iga, Yasuhiro Yoshida, Takashi Ohsawa, Hiroki Koike, Shunsuke Fukami, Shoji Ikeda, Naoki Kasai, Noboru Sakimura, Takahiro Hanyu, Hideo Ohno, and Tetsuo Endoh, "600MHz Nonvolatile Latch Based on a New MTJ/CMOS Hybrid Circuit Concept", The 3nd CSIS International Symposium on Spintronics-based VLSIs, Sendai, Japan, January 31, 2013.


  234. 国内会議


  235. 遠藤哲郎, 「STT-MRAM技術と究極のパワーマネジメントのための不揮発性ロジック応用」, 京都賞記念ワークショップ, セッションⅠ, 国立京都国際会館, 京都, 2013年11月12日.
  236. 遠藤哲郎, 「3次元構造とスピントロニクスによる半導体メモリの新展開」, 第77回半導体集積回路シンポジウム, 東京, 2013年7月
  237. Tetsuo Endoh, "A 1.5nsec/2.1nsec Random Read/Write Cycle 1Mb STT-RAM Using 6T2MTJ Cell with Background Write for Nonvolatile e-Memories", VLSI Symposium 2013の国内報告会, (講演番号C9-4),京都市, 2013年6月.
  238. 松永翔雲, 三浦貞彦, 本庄弘明, 木下啓蔵, 池田正二, 遠藤哲郎, 大野英男, 羽生貴弘, 「4T-2MTJセル構造に基づく不揮発TCAMチップの実現」, 信学技報, vol. 113, no. 1, ICD2013-7, pp. 33-38, 2013年4月.
  239. 辻幸秀, 根橋竜介, 崎村昇, 森岡あゆ香, 本庄弘明, 徳留圭一, 三浦貞彦, 鈴木哲広, 深見俊輔, 木下啓藏, 羽生貴弘, 遠藤哲郎, 笠井直記, 大野英男 杉林直彦, “スピン論理集積回路における基本ゲートの高信頼化技術”, 信学技報, vol. 113, no. 1, ICD2013-9, pp. 41-46, 2013年4月.
  240. 新居浩二, 遠藤哲郎, 加藤佳一, 半澤悟, 梶谷一彦, 川澄篤, 三輪達, “スマート社会におけるメモリソリューションの今後の展望 ~ 新不揮発メモリはSRAM/DRAM/フラッシュを置き換える?”, 信学技報, vol. 113, no. 1, ICD2013-11, pp. 53-53, 2013年4月.
  241. Tetsuo Endoh, Takashi Ohsawa, Hiroki Koike, Sadahiko Miura, Hiroaki Honjo, Keiichi Tokutome, Shoji Ikeda, Takahiro Hanyu and Hideo Ohno, “1Mb 4T-2MTJ Nonvolatile STT-RAM for Embedded Memories Using 32b Fine-Grained Power Gating Technique with 1.0ns/200ps Wake-Up/Power-Off Times”, IEICE Technical Reports, vol. 113, no. 1, ICD2013-6, pp. 27-32, April 2013.
  242. Tetsuo Endoh, “Restructuring of Memory Hierarchy in Computing System with Spintronics-Based Technologies,”IEICE Technical Reports, vol. 113, no. 1, ICD2013-5, pp. 21-26, April 2013.
  243. 遠藤哲郎、大澤隆、伊賀文崇、池田正二、羽生貴弘、大野英男,「不揮発性STT-MRAMの開発と今後の展望.」応用物理学会・特別シンポジウム,神奈川工科大学, 2013年3月.
  244. 遠藤哲郎,「3次元構造デバイスとスピン/CMOS融合デバイスが切り拓く集積エレクトロニクスの将来」, 第8回つくばナノテク拠点シンポジウム, 東京国際フォーラム,東京、2013年3月6日.
  245. 塩川太郎,藤田弦暉,高田幸宏,小鍋哲,村口正和,山本貴博,遠藤哲郎,初貝安弘,白石賢二,「多電子波束を用いた円電流ダイナミクスへの電子間相互作用の効果.」,日本物理学会2013年年次大会,26pXQ-4,2013年11月.
  246. 藤田弦暉,塩川太郎,高田幸宏,小鍋哲,村口正和,山本貴博, 遠藤哲郎,初貝安弘,白石賢二「スピン自由度を考慮した多電子波束ダイナミクスにおける電子間相互作用の効果.」日本物理学会2013年年次大会,26pXQ-3, 2013年11月.
  247. 遠藤哲郎,「縦型ボディチャネルMOSFETとその集積プロセスの開発」, JST-CREST 「次世代エレクトロニクスデバイスの創出に資する革新材料・プロセス研究」領域 第二回公開シンポジウム、東京、2013年2月8日
  248. 遠藤哲郎, 「縦型CMOSデバイスで目指す究極の3次元集積回路」, JST-CREST 「次世代エレクトロニクスデバイスの創出に資する革新材料・プロセス研究」領域 第二回公開シンポジウム、東京、2013年2月8日
  249. 遠藤哲郎、小池洋紀、大澤隆、羽生貴弘、笠井直記、大野英男, 「省エネシステムのためのSTT-MRAMと、そのロジック応用」, ゲートスタック研究会, ニューウェルシティー湯河原, 2013年1月25日
  250. 遠藤哲郎,「集積エレクトロニクス技術が切り開く省エネ社会」, 東北大学イノベーションフェア2013、仙台、2013年1月17日
  251. 遠藤哲郎,「グリーンパワー集積システムが拓く賢い省エネ社会」, 東北大学イノベーションフェア2013、仙台、2013年1月17日
  252. 遠藤哲郎、池田正二、羽生貴弘、笠井直記、大野英男,「MRAMの最新動向」,電子ジャーナル, 連合会館, 2013年1月11日



  253. 2012年(学術論文誌:21件;国際学会:26件;国内会議:11件。)



    学術論文誌


  254. Moon-Sik Seo, Bong-Hoon Lee, Sung-Kye Park, and Tetsuo Endoh, “Novel Concept of the Three-Dimensional Vertical FG NAND Flash Memory Using the Separated-Sidewall Control Gate”, IEEE Transactions on Electron Devices, Vol.59, No.8, pp:2078-2084, August 2012. [DOI: 10.1109/TED.2012.2200682]
  255. Masahiro Hori, Keigo Taira, Akira Komatsubara, Kuninori Kumagai, Yukinori Ono, Takashi Tanii , Tetsuo Endoh, Takahiro Shinada, "Reduction of threshold voltage fluctuation in field-effect transistors by controlling individual dopant position", Applied Physics Letters, Vol. 101, Issue 1, pp. 013503 (3pages), July 2012. [DOI: 10.1063/1.4733289]
  256. Shuta Togashi, Takashi Ohsawa, and Tetsuo Endoh, “Low Power Nonvolatile Counter Unit with Fine-Grained Power Gating”, IEICE Transactions on Electronics, Vol. E95-C,No. 5, pp. 854-859, May 2012. [URL]
  257. Hyoungjun Na and Tetsuo Endoh, “A Schmitt Trigger Based SRAM with Vertical MOSFET”, IEICE Transactions on Electronics, Vol.E95-C,No.5,pp:792-801, May 2012. [URL]
  258. Takuya Imamoto and Tetsuo Endoh, “Source/Drain Engineering for High Performance Vertical MOSFET”, IEICE TRANSACTIONS on Electronics, Vol.E95-C, No.5, pp.807-813, May 2012. [URL]
  259. Moon-Sik Seo and Tetsuo Endoh, “FG Width Scalability of the 3-D Vertical FG NAND Using the Sidewall Control Gate (SCG)”, IEICE Transactions on Electronics, Vol. E95-C, No. 5, pp. 891-897, May 2012. [URL]
  260. Yuto Norifusa and Tetsuo Endoh, “Evaluation of Performance in Vertical 1T-DRAM and Planar 1T-DRAM”, IEICE Transactions on Electronics, Vol. E95-C, No. 5, pp. 847-853, May 2012. [URL]
  261. Daisuke Suzuki, Masanori Natsui, Tetsuo Endoh, Hideo Ohno, and Takahiro Hanyu, "Design of a Compact Nonvolatile Four-Input Logic Element Using a Magnetic Tunnel Junction and Metal?Oxide?Semiconductor Hybrid Structure," Japanese Journal of Applied Physics (JJAP), Vol. 51, pp. 04DM02 (5 pages), April 2012. [DOI: 10.1143/JJAP.51.04DM02]
  262. Satoru Tanoi and Tetsuo Endoh, “A Wide-Range Tunable Level-Keeper Using Vertical Metal-Oxide-Semiconductor Field-Effect Transistors for Current-Reuse Systems”, Japanese Journal of Applied Physics (JJAP), Vol.51, pp. 04DE11(7 pages), April 2012. [DOI: 10.1143/JJAP.51.04DE11]
  263. Hyoungjun Na and Tetsuo Endoh, “Current Controlled MOS Current Mode Logic with Auto-Detection of Threshold Voltage Fluctuation”, IEICE Transactions on Electronics, Vol. E95-C,No. 4,pp:617-626, April 2012. [URL]
  264. Mitsuhiro Arikawa, Yasuhiro Hatsugai, Tetsuo Endoh, Kenji Shiraishi, “Wave Packet Dynamics in the Spin Torque Transfer”, Journal of thePhysical Society of Japan (JPSJ), Vol. 81, pp:044706 (4 pages), March 2012. [DOI: 10.1143/10.1143/JPSJ.81.044706]
  265. Shoun Matsunaga, Akira Katsumata, Masanori Natsui, Tetsuo Endoh, Hideo Ohno, and Takahiro Hanyu, "Design of a 270ps-access 7-transistor/2-magnetic-tunnel-junction cell circuit for a high-speed-search nonvolatile ternary content-addressable memory", Journal of Applied Physics (JAP), Vol. 111, pp.07E336 (3 pages), March 2012. [DOI: 10.1063/1.3677875]
  266. Daisuke Suzuki, Masanori Natsui, Tetsuo Endoh, Hideo Ohno, and Takahiro Hanyu, "Six-input lookup table circuit with 62% fewer transistors using nonvolatile logic-in-memory architecture with series/parallel-connected magnetic tunnel junctions", Journal of Applied Physics (JAP), Vol. 111, pp.07E318 (3 pages), February 2012. [DOI: 10.1063/1.3672411]
  267. Shoun Matsunaga, Akira Katsumata, Masanori Natsui, Tetsuo Endoh, Hideo Ohno, and Takahiro Hanyu, ``Design of a Nine-Transistor/Two-Magnetic-Tunnel-Junction-Cell-Based Low-Energy Nonvolatile Ternary Content-Addressable Memory", Japanese Journal of Applied Physics (JJAP) vol. 51, pp.02BM06(6 pages), February 2012. [DOI: 10.1143/JJAP.51.02BM06]
  268. Yukihiro Takada, Young Taek Yoon, Taro Shiokawa, Satoru Konabe, Mitsuhiro Arikawa, Masakazu Muraguchi, Tetsuo Endoh, Yasuhiro Hatsugai and Kenji Shiraishi,“Multi-Electron Wave Packet Dynamics in Applied Electric Fields”,Japanese Journal of Applied Physics (JJAP), vol.51, 02BJ01 (5 pages), February 2012. [DOI: 10.1143/JJAP.51.02BJ01]
  269. Takashi Ohsawa, Fumitaka Iga, Shoji Ikeda, Takahiro Hanyu, Hideo Ohno, and Tetsuo Endoh, "High-Density and Low-Power Nonvolatile Static Random Access Memory Using Spin-Transfer-Torque Magnetic Tunnel Junction", Japanese Journal of Applied Physics (JJAP), Vol. 51, 02BD01 (6 pages), February 2012. [DOI: 10.1143/JJAP.51.02BD01]
  270. Fumitaka Iga, Yasuhiro Yoshida, Shoji Ikeda, Takahiro Hanyu, Hideo Ohno, and Tetsuo Endoh, "Time-Resolved Switching Characteristic in Magnetic Tunnel Junction with Spin Transfer Torque Write Scheme", Japanese Journal of Applied Physics (JJAP), Vol. 51, pp.02BM02 (5 pages),February 2012. [DOI: 10.1143/JJAP.51.02BM02]
  271. Shuta Togashi, Takashi Ohsawa, and Tetsuo Endoh, “Nonvolatile Low Power 16-bit/32-bit Magnetic Tunnel Junction Based Binary Counter and Its Scaling”, Japanese Journal of Applied Physics (JJAP), vol.51, pp:02BE07 (5 pages) , February 2012. [DOI: 10.1143/JJAP.51.02BE07]
  272. Hyoungjun Na and Tetsuo Endoh, “A Compact Half Select Disturb Free Static Random Access Memory Cell with Stacked Vertical Metal?Oxide?Semiconductor Field-Effect Transistor”, Japanese Journal of Applied Physics (JJAP), Vol. 51, pp.02BD03 (8 pages) , February 2012. [DOI: 10.1143/JJAP.51.02BD03]
  273. Mitsuhiro Arikawa, Masakazu Muraguchi, Yasuhiro Hatsugai, Kenji Shiraishi and Tetsuo Endoh, “Role of Synthetic Ferrimagnets in Magnetic Tunnel Junctions from Wave Packet Dynamics”, Japanese Journal of Applied Physics (JJAP), Vol.51, pp.02BM03 (4 pages), February 2012. [DOI: 10.1143/JJAP.51.02BM03]
  274. Moon-Sik Seo and Tetsuo Endoh, “Disturb-Free Three-Dimensional Vertical Floating Gate NAND with Separated-Sidewall Control Gate”, Japanese Journal of Applied Physics (JJAP), Vol. 51, pp:02BD04 (7pages), February 2012. [DOI: 10.1143/JJAP.51.02BD04]


  275. 国際学会


       
  276. Tetsuo Endoh, Co-Researchers: T. Ohsawa, H. Koike,T. Hanyu, H. Sato, S. Ikeda, H. Ohno, “Tutorial: Spintronics for Embedded Non-volatile Electronics”, International Electron Devices Meeting (IEDM), Hilton San Francisco Union Square, CA, USA, December 8, 2012.
  277. Tetsuo Endoh, “MTJ Based Non-volatile RAM and Logic for Future System with Standby Power Zero”, 9th Sematech International Symposium on Advanced Gate Stack Technology, Saratoga City Center, Saratoga Springs, NY, USA, October 4, 2012.
  278. Tetsuo Endoh, "Current Status of NAND Memories and its Future Prospect with 3D NAND Technology”, 222nd Electrochemical Society (ECS) Meeting (ECS Prime 2012), No. 2817, Hawaii, USA, October 10, 2012. [URL]
  279. Hyoungjun Na and Tetsuo Endoh, "A DRAM Sense Amplifier Circuit by Multi-pillar Vertical MOSFET Realizing Sub-1V Core Voltage Operation without Overdrive Technique", 2012 International Conference on Solid State Devices and Materials (SSDM), J-5-4, pp.1148-1149, Kyoto, Japan, September 25-27, 2012.
  280. Satoru Tanoi, Tetsuo Endoh, "A 3-mW/Gbps 1.8-V Current-reuse LVDS Driver with 30% Power Reduction using Vertical MOSFETs", 2012 International Conference on Solid State Devices and Materials (SSDM), pp152-153. Kyoto,Japan, September 25-27, 2012.
  281. Takuya Imamoto and Tetsuo Endoh, "Novel Field Effect Diode type Vertical Capacitorless 1T-DRAM Cell with Negative Hold Bit Line Bias Scheme for Improving the Hold Characteristics", 2012 International Conference on Solid State Devices and Materials (SSDM), pp588-589, Kyoto, Japan, September 25-27, 2012.
  282. Taro Shiokawa, Yukihiro Takada, Satoru Konabe, Masakazu Muraguchi, Tetsuo Endoh, Yasuhiro Hatsugai, Kenji Shiraishi, "Effect of Coulomb Interaction in Electron Wave Packet Dynamics in Nanoscale Devices", 2012 International Conference on Solid State Devices and Materials (SSDM), Kyoto, Japan, September 26, 2012.
  283. Yukihiro Takada, Young Taek Yoon, Taro Shiokawa, Satoru Konabe, Mitsuhiro Arikawa, Masakazu Muraguchi, Tetsuo Endoh, Yasuhiro Hatsugai, Kenji Shiraishi, “Effectiveness of Time-Dependent Hartree-Fock Approaches for Multi-Electron Wave Packet Dynamics in Nanoscale Structures”,The 31th International Confernece on the Physics of Semiconductors (ICPS2012), 37.14, Zurich, Switzerland, July 29- August 3, 2012.
  284. Taro Shiokawa, Yukihiro Takada, Young Taek Yoon, Satoru Konabe, Masakazu Muraguchi, Mitsuhiro Arikawa, Tetsuo Endoh, Yasuhiro Hatsugai, Kenji Shiraishi, “The Effect of Coulomb Interaction in Multi-Electron Wave Packet Dynamics”, The 31th International Confernece on the Physics of Semiconductors (ICPS2012), 67.32, Zurich, Switzerland, July 29-August 3, 2012.
  285. Tetsuo Endoh, Takashi Ohsawa, Takahiro Hanyu and Hideo Ohno, "MTJ based nonvolatile logic for ultimate power management",The 19th International Conference on Magnetism with Strongly Correlated Electron Systems (ICM2012 with SCES), Bexco, Busan, KOREA, July 8-13, 2012.
  286. Y. Tsuji, R. Nebashi, N. Sakimura, A. Morioka, H. Honjo, K. Tokutome, S. Miura, T. Suzuki, S. Fukami, K. Kinoshita, T. Hanyu, T. Endoh, N. Kasai, H. Ohno, T. Sugibayashi, "Spintronics primitive gate with high error correction efficiency 6(Perror)2 for logic-in memory architecture ", IEEE Symposium on VLSI Technology (VLSIT) pp. 63-64, Hawaii, USA, June 12-14, 2012. [DOI: 10.1109/VLSIT.2012.6242462]
  287. Tetsuo Endoh, Takashi Ohsawa, Hiroki Koike, Takahiro Hanyu and Hideo Ohno, “Restructuring of memory hierarchy in computing system with spintronics-based technologies”, 2012 Symposium on VLSI Circuits (VLSIC), pp. 89-90, Hawaii, USA, June 12-14, 2013. [DOI: 10.1109/VLSIT.2012.6242475]
  288. Shoun Matsunaga, Sadahiko Miura, Hiroaki Honjou, Keizo Kinoshita, Shoji Ikeda, Tetsuo Endoh, Hideo Ohno, and Takahiro Hanyu, “A 3.14 μm2 4T-2MTJ-Cell Fully Parallel TCAM Based on Nonvolatile Logic-in-Memory Architecture”, IEEE Symposium on VLSI Circuits Digest of Technical Papers (VLSIC), pp. 44-45, June 13-15, 2012. [DOI: 10.1109/VLSIC.2012.6243781]
  289. Takuya Imamoto and Tetsuo Endoh, “The Asymmetric I-V Characteristics of Vertical MOSFET Induced by Tapered Silicon Pillar”, 2012 Asia-Pacific Workshop on Fundamentals and Applications of Advanced Semiconductor Devices (AWAD 2012),2A.2,pp.38-42, Okinawa, Naha, Japan, June 27-29, 2012.
  290. Hyoungjun Na and Tetsuo Endoh, “A High Performance SRAM Sense Amplifier with Vertical MOSFET”, 2012 Asia-Pacific Workshop on Fundamentals and Applications of Advanced Semiconductor Devices (AWAD 2012),2A.3, pp:43-47, Okinawa, Naha, Japan, June 27-29, 2012.
  291. Takashi Ohsawa, Hiroki Koike, Sadahiko Miura, Hiroaki Honjo, Keiichi Tokutome,, S. Ikeda, T. Hanyu, H. Ohno, and T. Endoh, “1Mb 4T-2MTJ Nonvolatile STT-RAM for Embedded Memories Using 32b Fine-Grained Power Gating Technique with 1.0ns/200ps Wake-up/Power-off Times”, 2012 Symposia on VLSI Technology and Circuits (VLSIT), 2012 Symposium on VLSI Circuits (VLSIC) Digest of Technical Papers pp.46-47, Honolulu, Hawaii, USA, June 12-15, 2012 [DOI: 10.1109/VLSIC.2012.6243782]
  292. N. Sakimura, R. Nebashi, Y. Tsuji, H. Honjo, T. Sugibayashi, H. Koike, T. Ohsawa, S. Fukami, T. Hanyu, H. Ohno and T. Endoh, "High-speed simulator including accurate MTJ models for spintronics integrated circuit design ", IEEE International Symposium on Circuits and Systems (ISCAS), pp. 1971-1974, Seoul, Korea, May 20-23, 2012. [DOI: 10.1109/ISCAS.2012.6271663]
  293. Moon-Sik Seo, Jong-Moo Choi, Sung-kye Park and Tetsuo Endoh, “Highly Scalable 3-D Vertical FG NAND Cell Arrays Using the Sidewall Control Pillar (SCP)”, The 4th IEEE International Memory Workshop (IMW 2012), pp. 1-4, Milan, Italy, May 20- 23, 2012. [DOI: 10.1109/IMW.2012.6213645]
  294. Taro Shiokawa, Yukihiro Takada, Young Taek Yoon, Satoru Konabe, Masakazu Muraguchi, Mitsuhiro Arikawa, Tetsuo Endoh, Yasuhiro Hatsugai, Kenji Shiraishi, "Applied Electric Field Dependence of Multi-Electron Wave Packet Dynamics", The Eighth International Nanotechnology Conference on Communication and Cooperation (INC8), Tu114, Tsukuba, Japan, May 8-11, 2012
  295. Hyoungjun Na and Tetsuo Endoh, “A High Efficient and Compact Charge Pump with Multi-pillar Vertical MOSFET”, 2012 International Symposium on VLSI Technology, Systems and Applications (2012 VLSI-TSA), T86, pp.1-2, Ambassador Hotel Hsinchu, Hsinchu, Taiwan, April 23-25, 2012. [DOI: 10.1109/VLSI-TSA.2012.6210118]
  296. Tetsuo Endoh (Moderator), Panel Discussion "Spintronics-based VLSIs, What remains to be done?", The 2nd CSIS International Symposium on Spintronics-based VLSIs and The 8th RIEC International Workshop on Spintronics, February 2, 2012.
  297. Shuta Togashi, Takashi Ohsawa, and Tetsuo Endoh, "Nonvolatile Low Power 16-bit/32-bit Binary Counter with MTJ and its Scalability", The 2nd CSIS International Symposium on Spintronics-based VLSIs and The 8th RIEC International Workshop on Spintronics, February 2, 2012.
  298. Hiroki Koike,, Takashi Ohsawa, and Tetsuo Endoh, "A Study for Adopting PMOS Memory Cell for 1T1R STT-RAM with Asymmetric Switching Current MTJ", The 2nd CSIS International Symposium on Spintronics-based VLSIs and The 8th RIEC International Workshop on Spintronics, February 2, 2012.
  299. Takashi Ohsawa, Hiroki Koike, Shoji Ikeda, Takahiro Hanyu, Hideo Ohno and Tetsuo Endoh, "Proposal of new MTJ-based nonvolatile memories", The 2nd CSIS International Symposium on Spintronics-based VLSIs and The 8th RIEC International Workshop on Spintronics, February 2, 2012.
  300. R. Nebashi, N Sakimura, Y Tusji, S Fukami, H. Honjo, S Saito, S Miura, N Ishiwata, K. Kinoshita, T. Hanyu, T. Endoh, N. Kasai , H. Ohno and T. Sugibayashi, "A content addressable memory using three-terminal magnetic domain wall motion cells", The 2nd CSIS International Symposium on Spintronics-based VLSIs and The 8th RIEC International Workshop on Spintronics, February 2, 2012.
  301. Shoun Matsunaga, Masanori Natsui, Shoji Ikeda, Katsuya Miura, Tetsuo Endoh, Hideo Ohno, and Takahiro Hanyu, ``Implementation of a Perpendicular MTJ-Based Read-Disturb-Tolerant 2T-2RNonvolatileTCAM Based on a Reversed Current Reading Scheme," Proc. Asia and South Pacific Design Automation Confrence (ASP-DAC), pp. 475-476, Sydney, Australia, January 2012. [DOI: 10.1109/ASPDAC.2012.6164998]


  302. 国内会議


  303. 遠藤哲郎, 「待機電力ゼロシステムを切り開くSTT-MRAMの現状と将来(STT-MRAM Technology for realizing a Zero standby-power system and its future potential)」, セミコン・ジャパン2012, 幕張メッセ 国際会議場, 2012年12月5日.
  304. 遠藤哲郎, 「集積化デバイスのための課題と将来ビジョン(パネル討論)」, JST-CREST×さきがけ ジョイントワークショップ、東京、2012年10月26日.
  305. 遠藤哲郎, 「縦型ボディチャネルMOSFETとその集積プロセスの開発」, JST-CREST×さきがけ ジョイントワークショップ、東京、2012年10月26日.
  306. 塩川太郎,藤田弦暉,高田幸宏,小鍋哲,村口正和,山本貴博,遠藤哲郎,初貝安弘,白石賢二, “一次元非一様ポテンシャル中の波束ダイナミクス”, 日本物理学会講演概要集, 21aFB-10, pp. 653,京都産業大学, 京都,2012年9月.[URL]
  307. 藤田弦暉,塩川太郎,高田幸宏,小鍋哲,村口正和,山本貴博,遠藤哲郎,初貝安弘, 白石賢二, “ナノ構造中の多電子波束ダイナミクスにおける電子間相互作用の効果”, 日本物理学会講演概要集, 21aFB-9, pp. 652,京都産業大学, 京都,2012年9月. [URL]
  308. 遠藤哲郎, 「パワー半導体と知的電力制御技術が拓く快適な省エネ社会」, 東北大学 電気・情報系 新専攻設立記念講演会、仙台、2012年7月31日.
  309. 遠藤哲郎, 「エネルギー利用効率を飛躍的に高める集積エレクトロニクスデバイス技術」, JST-CRDSナノテクノロジー・材料分野俯瞰ワークショップ、東京、2012年6月8日.
  310. 遠藤哲郎, 「待機電力ゼロを目指した高度エネルギーマネージメント技術」, JST-CRDSナノテクノロジー・材料分野俯瞰ワークショップ、東京、2012年6月8日.
  311. Ryusuke Nebashi, Noboru Sakimura, Yukihide Tsuji, Shunsuke Fukami, Hiroaki Honjo, Shinsaku Saitoh, Sadahiko Miura, Nobuyuki Ishiwata, Keizo Kinoshita, Takahiro Hanyu, Tetsuo Endoh, Naoki Kasai, Hideo Ohno, Tadahiko Sugibayashi, "A Non-Volatile Content Addressable Memory Using Three-Terminal Magnetic Domain Wall Motion Cells", IEICE Technical Reports, vol. 112, no. 15, ICD2012-10, pp. 49-54, April 2012.[URL]
  312. 塩川太郎、髙田幸宏、尹永択、岩田潤一、小鍋哲、有川晃弘、村口正和、遠藤哲郎、初貝安弘、白石賢二, 「半導体ナノ構造における多電子波束ダイナミクスの印加電圧依存性」, 日本物理学会2012年年次大会, 関西学院大学, 兵庫, 2012年3月24日-27日.[URL]
  313. 高田幸宏, 塩川太郎, 尹永択、岩田潤一、小鍋哲、有川晃弘、村口正和、遠藤哲郎、初貝安弘、白石賢二, 「2次元半導体ナノ構造における多電子波束ダイナミクスの検討」, 日本物理学会2012年年次大会, 関西学院大学, 兵庫, 2012年3月24日-27日.
  314.    


    2011年(学術論文誌:18件;国際学会:50件;国内会議:10件。)



    学術論文誌


  315. Tetsuo Endoh, "Restructuring of Memory Layer in Electrical System and Its Novel Evolution with Nonvolatile Logic", Electrochemical Society (ECS) Transactions, Vol. 41, Issue 7, pp. 59-71, October 2011. [DOI: 10.1149/1.3633285]
  316. Moon-Sik Seo, Sung-Kye Park, and Tetsuo Endoh, "3-D Vertical FG NAND Flash Memory With a Novel Electrical S/D Technique Using the Extended Sidewall Control Gate", IEEE TRANSACTIONS ON ELECTRON DEVICES Vol. 58, Issue 9, pp. 2966-2973, Septmenber 2011. [DOI: 10.1109/TED.2011.2160642]
  317. Masahiro Hori, Takahiro Shinada, Yukinori Ono, Akira Komatsubara, Kuninori Kumagai, Takashi Tanii, Tetsuo Endoh, and Iwao Ohdomari, "Impact of a few dopant positions controlled by deterministic single-ion doping on the transconductance of field-effect transistors", Appliled Physics Letters, Vol. 99, pp. 062103 (4 pages), August 2011.[DOI: 10.1063/1.3622141]
  318. Shoun Matsunaga, Masanori Natsui, Shoji Ikeda, Katsuya Miura, Tetsuo Endoh, Hideo Ohno, and Takahiro Hanyu, "Design and Fabrication of a One-Transistor/One-Resistor Nonvolatile Binary Content-Addressable Memory Using Perpendicular Magnetic Tunnel Junction Devices with a Fine-Grained Power-Gating Scheme", Japanese Journal of Applied Physics (JJAP), Vol. 50, pp. 063004 (7 pages), June 2011. [DOI: 10.1143/JJAP.50.063004]
  319. Masashi Kamiyanagi, Takuya Imamoto, Takeshi Sasaki, Hyoungjun Na, and Tetsuo Endoh, "Verification of Stable Circuit Operation of 180nm Current Controlled MOS Current Mode Logic under Threshold Voltage Fluctuation", IEICE TRANSACTIONS on Electronics, Vol. E94-C, No.5, pp.760-766, May 2011. [URL]
  320. Takeshi Sasaki, Takuya Imamoto, and Tetsuo Endoh, "Temperature Dependency of Driving Current in High-k/Metal Gate MOSFET and Its Influence on CMOS Inverter Circuit", IEICE Transctions on Electronics, Vol. E94-C, No. 5, pp. 751-759, May 2011.[URL]
  321. Tetsuo Endoh, Masashi Kamiyanagi, Masakazu Muraguchi, Takuya Imamoto and Takeshi Sasaki, "The Impact of Current Controlled-MOS Current Mode Logic /Magnetic Tunnel Junction Hybrid Circuit for Stable and High-speed Operation", IEICE Transctions on Electronics, Vol. E94-C, No. 5, pp. 743-750, May 2011.[URL]
  322. Takuya Imamoto, Takeshi Sasaki, and Tetsuo Endoh, "Evaluation of 1/f Noise Characteristics in High-k/Metal Gate and SiON/Poly-Si Gate MOSFET with 65nm CMOS Process", IEICE Transctions on Electronics, Vol. E94-C, No. 5, pp. 724-729, May 2011.[URL]
  323. Masakazu Muraguchi and Tetsuo Endoh, "Study on Impurity Distribution Dependence of Electron-Dynamics in Vertical MOSFET", IEICE Transctions on Electronics, Vol. E94-C, No. 5, pp. 737-742, May 2011.[URL]
  324. Masakazu Muraguchi , Yoko Sakurai, Yukihiro Takada, Shintaro Nomura, Kenji Shiraishi, Mitsuhisa Ikeda, Katsunori Makihara, Seiichi Miyazaki, Yasuteru Shigeta and Tetsuo Endoh, "Study on Collective Electron Motion in Si-Nano Dot Floating Gate MOS Capacitor", IEICE Transctions on Electronics, Vol. E94-C, No. 5, pp. 730-736, May 2011.[URL]
  325. Yuto Norifusa and Tetsuo Endoh, "Impact of Floating Body Type DRAM with the Vertical MOSFET", IEICE Transctions on Electronics, Vol. E94-C, No. 5, pp. 705-711, May 2011.[URL]
  326. Moon-Sik Seo and Tetsuo Endoh, "The Optimum Physical Targets of the 3-Dimensional Vertical FG NAND Flash Memory Cell Arrays with the Extended Sidewall Control Gate (ESCG) Structure", IEICE Transctions on Electronics, Vol. E94-C, No. 5, pp. 686-692, May 2011. [URL]
  327. Masakazu Muraguchi, Yoko Sakurai, Yukihiro Takada, Yasuteru Shigeta, Mitsuhisa Ikeda, Katsunori Makihara, Seiichi Miyazaki, Shintaro Nomura, Kenji Shiraishi, and Testuo Endoh, "Collective Tunneling Model in Charge-Trap-Type Nonvolatile Memory Cell",Japanese Journal of Applied Physics (JJAP), Vol. 50, pp. 04DD04 (4 pages), April 2011. [DOI: 10.1143/JJAP.50.04DD04]
  328. Masato Kushibiki, Arisa Hara, Eiichi Nishimura, and Tetsuo Endoh, "Fabrication of Silicon Pillar with 25 nm Half Pitch Using New Multiple Double Patterning Technique", Japanese Journal of Applied Physics (JJAP), ,Vol. 50, pp. 04DA16 (5 pages), April 2011. [DOI: 10.1143/JJAP.50.04DA16]
  329. Masahiro Hori, Takahiro Shinada, Keigo Taira, Akira Komatsubara, Yukinori Ono, Takashi Tanii, Tetsuo Endoh, and Iwao Ohdomari, "Enhancing Single-Ion Detection Efficiency by Applying Substrate Bias Voltage for Deterministic Single-Ion Doping", Applied Physics Express (APEX), Vol. 4, pp. 046501(3 pages), March 2011.[DOI: 10.1143/APEX.4.046501]
  330. Masakazu Muraguchi, Yuko Sakurai, Yukihiro Takada, Yasuteru Shigeta, Mitsuhisa Ikeda, Katsunori Makihara, Seiichi Miyazaki, Shintaro Nomura, Kenji Shiraishi, and Tetsuo Endoh, "Collective Electron Tunneling Model in Si-Nano Dot Floating Gate MOS Structure", Key Engineering Materials, Vol. 470, pp. 48-53, February 2011. [DOI: 10.4028/www.scientific.net/KEM.470.48]
  331. Yukihiro Takada, Masakazu Muraguchi, Tetsuo Endoh, Shintaro Nomura and Kenji Shiraishi, "Investigation about I-V Characteristics in a New Electronic Structure Model of the Ohmic Contact for Future Nano-scale Ohmic Contact", Key Engineering Materials, Vol. 470, pp. 43-47, February 2011. [DOI: 10.4028/www.scientific.net/KEM.470.43]
  332. Masakazu Muraguchi, Yoko Sakurai, Yukihiro Takada, Yasuteru Shigeta, Mitsuhisa Ikeda, Katsunori Makihara, Seiichi Miyazaki, Shintaro Nomura, Kenji Shiraishi and Tetsuo Endoh, "Collective Electron Tunneling Model in Si-Nano Dot Floating Gate MOS Structure", Key Engineering Materials, Vol.470, pp. 48-53, February, 2011. [DOI: 10.4028/www.scientific.net/KEM.470.48]


  333. 国際学会


  334. Testuo Endoh, Shuta Togashi, Fumitaka Iga, Yasuhiro Yoshida, Takashi Ohsawa, Hiroki Koike, Shunsuke Fukami, Shoji Ikeda, Naoki Kasai, , Noboru Sakimura, Takahiro, Hanyu and Hideo Ohno, "A 600MHz MTJ-Based Nonvolatile Latch Making Use of Incubation Time in MTJ Switching", International Electron Devices Meeting (IEDM), pp. 4.3.1 - 4.3.4, Washington, D.C., USA, Decmeber 5-7, 2011. [DOI: 10.1109/IEDM.2011.6131487]
  335. -->
  336. T. Shinada, M. Hori, F. Guagliarldo, G. Ferrari, A. Komatubara, K. Kumagai, T. Tanii, T. Endoh, Y. Ono, E. Prati, "Quantum transport in deterministically implanted single-donors in Si FETs", International Electron Devices Meeting (IEDM), pp. 30.4.1 - 30.4.4 , Washington, D.C., USA, Decmeber 5-7, 2011. [DOI: 10.1109/IEDM.2011.6131644]
  337. Yitao Ma, Tadashi Shibata and Tetsuo Endoh, "A Vertical-MOSFET-Based Digital Core Circuit for High-Speed Low-Power Vector Matching", International SoC Design Conference (ISOCC), S11-1, pp. 203-206, Jeju, Korea, November 17-18, 2011.[DOI: 10.1109/ISOCC.2011.6138745]
  338. Tetsuo Endoh, "Impact of Vertical Structured devices for Future Nano LSI", AVS 58th International Symposium and Exhibition, EM-MoM10, 71, Tennessee, USA, Octorber 30-November 4, 2011.
  339. Tetsuo Endoh, "Impact of Vertical Structured Devices and Spintronic Devices for Future Nano LSI", International Workshop on Quantum Nanostructures and Nanoelectronics (QNN2011),Devices and Circuits, Tokyo, Japan, October 3-4, 2011.
  340. Tetsuo Endoh, "Vertical Structured Cells and Vertical Stacked Cells for Nano-Generation High Density Memory", 220th Electrochemical Society (ECS) Meeting, Session: E9-ULSI Process Integration, MA, USA, October 9-14, 2011.
  341. Tetsuo Endoh, "3D Vertical Structured Memory and Spintoronics Memory Technology", 1st Annual World Congress of Nano-S&T Conference,Track 2-2, Dalian, China, October 23, 2011.
  342. Takeshi Sasaki and Tetsuo Endoh, "Body Channel Type Vertical MOSFET to Suppress Gate Leakage Current", International Conference on Solid State Devices and Materials (SSDM), pp.104-105, Nagoya, Japan, September 28-30, 2011.
  343. Mitsuhiro Arikawa, Masakazu Muraguchi, Yasuhiro Hatsugai, Kenji Shiraishi, and Tetsuo Endoh, "Role of Synthetic Ferrimagnets in MTJs from Wave Packet Dynamics", International Conference on Solid State Devices and Materials (SSDM), pp. 1472-1473, Nagoya, Japan, September 28-30, 2011.
  344. Fumitaka Iga, Yasuhiro Yoshida, Shoji Ikeda, Takahiro Hanyu, Hideo Ohno, and Tetsuo Endoh, "Time-Resolved Switching Characteristic in Magnetic Tunnel Junction with Spin Transfer Torque Write Scheme", International Conference on Solid State Devices and Materials (SSDM), pp. 1468-1469, Nagoya, Japan, September 28-30, 2011.
  345. Daisuke Suzuki, Masanori Natsui, Tetsuo Endoh, Hideo Ohno, and Takahiro Hanyu, "A Compact Nonvolatile Logic Element Using an MTJ/MOS-Hybrid Structure", International Conference on Solid State Devices and Materials (SSDM), pp. 1464-1465, Nagoya, Japan, September 28-30, 2011.
  346. Yukihiro Takada, Young Taek Yoon, Taro Shiokawa, Satoru Konabe, Mitsuhiro Arikawa, Masakazu Muraguchi, Tetsuo Endoh, Yasuhiro Hatsugai, Kenji Shiraishi, "Multi Electron Wave Packet Dynamics in Applied Electric Fields", International Conference on Solid State Devices and Materials (SSDM), pp. 1199-1200, Nagoya, Japan, September 28-30, 2011.
  347. Moon-Sik Seo and Tetsuo Endoh, "Disturb-free 3D vertical FG NAND with Separated-Sidewall Control Gate", International Conference on Solid State Devices and Materials (SSDM), pp. 979-980, Nagoya, Japan, September 28-30, 2011.
  348. Hyoungjun Na and Tetsuo Endoh, "A Compact Half Select Disturb Free SRAM Cell with Stacked Vertical MOSFET", International Conference on Solid State Devices and Materials (SSDM), vpp. 973-974, Nagoya, Japan, September 28-30, 2011.
  349. Fumitaka. Iga, Yasuhiko Suzuki, Takashi Ohsawa, Shoji Ikeda, Takahiro Hanyu, Hideo Ohno, and Tetsuo Endoh, "Novel 2step Writing Method for STT-RAM to Improve Switching Probability and Write Speed", International Conference on Solid State Devices and Materials (SSDM), pp. 963-964, Nagoya, Japan, September 28-30, 2011.
  350. Hiroki Koike and Tetsuo Endoh, "A Study for Adopting PMOS Memory Cell for 1T1R STT-RAM with Asymmetric Switching Current MTJ",International Conference on Solid State Devices and Materials (SSDM), pp. 961-962, Nagoya, Japan, September 28-30, 2011.
  351. Takashi Ohsawa, Fumitaka Iga, Shoji Ikeda, Takahiro, Hanyu, Hideo Ohno, and Testuo Endoh, "Studies on Static Noise Margin and Scalability for Low-Power and High-Density Nonvolatile SRAM using Spin -Transfer -Torque (STT) MTJs", International Conference on Solid State Devices and Materials (SSDM), pp. 959-960, Nagoya, Japan, September 28-30, 2011.
  352. Shoun Matsunaga, Akira Katsumata, Masanori Natsui, Tetsuo Endoh, Hideo Ohno, and Takahiro Hanyu, "High-Speed-Search Nonvolatile TCAM Using MTJ Devices", International Conference on Solid State Devices and Materials (SSDM), pp. 454-455, Nagoya, Japan, September 28-30, 2011.
  353. Satoru Tanoi and Tetsuo Endoh, "A Wide-Range Tunable Level-Keeper using Vertical MOSFETs for Current-Reuse Systems", International Conference on Solid State Devices and Materials (SSDM), pp. 178-179, Nagoya, Japan, September 28-30, 2011.
  354. Shuta Togashi, Takashi Ohsawa, and Tetsuo Endoh, "Nonvolatile Low Power 16-bit/32-bit MTJ Based Binary Counter and its Scaling", International Conference on Solid State Devices and Materials (SSDM), pp. 166-167, Nagoya, Japan, September 28-30, 2011.
  355. M. Muraguchi, Y. Sakurai, Y. Takada, S. Nomura, K. Shiraishi, M. Ikeda, K. Makihara, S. Miyazaki, Y. Shigeta, and T. Endoh, "Collective Tunneling Model between Two-Dimensional Electron Gas to Si-nano dot", 30th International Conference on the Physics of Semiconductors, AIP Conference Proceedings, Vol. 1399, pp. 295-296, Seoul, Korea, December 23, 2011. [DOI: 10.1063/1.3666370]
  356. Akihiro Itagaki and Tetsuo Endoh, "Device Desing of Multi Gate structure IMOS", Asia-Pacific Workshop on Fundamentals and Applications of Advanced Semiconductor Devices (AWAD), 1A.5, pp. 15-19, Daejeon, Korea, June 29 - July 1, 2011.
  357. Hyoungjun Na and Tetsuo Endoh, "A Schmitt Trigger Based SRAM with Vertical MOSFET", Asia-Pacific Workshop on Fundamentals and Applications of Advanced Semiconductor Devices (AWAD), 3B11, pp. 271-274, Daejeon, Korea, June 29 - July 1, 2011.
  358. Shuta Togashi, Takashi Ohsawa and Tetsuo Endoh, "Low Power Nonvolatile Counter Circuit with Fine-Grained Power Gating", Asia-Pacific Workshop on Fundamentals and Applications of Advanced Semiconductor Devices (AWAD), 3B.10, pp. 267-270, Daejeon, Korea, June 29 - July 1, 2011.
  359. Yuto Norifusa and Tetsuo Endoh, "Evaluation of Performance in Vertical 1T-DRAM and Planar 1T-DRAM", Asia-Pacific Workshop on Fundamentals and Applications of Advanced Semiconductor Devices (AWAD), 3A.10, pp. 225-230, Daejeon, Korea, June 29 - July 1, 2011.
  360. Mitsuhiro Arikawa, Yasuhiro Hatsugai, Kenji Shiraishi, and Tetsuo Endoh, "Electron dynamics in the ferromagnetic tunnel junction", Asia-Pacific Workshop on Fundamentals and Applications of Advanced Semiconductor Devices (AWAD), 3A.5, pp. 205-209, Daejeon, Korea, June 29 - July 1, 2011.
  361. Yukihiro Takada, Young Taek Yoon, Taro Shiokawa, Satoru Konabe, Mitsuhiro Arikawa, Masakazu Muraguchi, Tetsuo Endoh, Yasuhiro Hatsugai, Kenji Shiraishi, "Electron Dynamics in the Nano scale Transistor", Asia-Pacific Workshop on Fundamentals and Applications of Advanced Semiconductor Devices (AWAD)3A.4, pp. 199-203, Daejeon, Korea, June 29 - July 1, 2011.
  362. Fumitaka Iga, Shoji Ikeda, Takahiro Hanyu, Hideo Ohno, and Tetsuo Endoh, "Study of the Resistive Switching in CoFeB/MgO/CoFeB Magnetic Tunnel Junction Integrated on Back-End Metal Line of CMOS Circuit", Asia-Pacific Workshop on Fundamentals and Applications of Advanced Semiconductor Devices (AWAD), 2B.8, pp. 171-174, Daejeon, Korea, June 29 - July 1, 2011.
  363. Yasuhiro Yoshida, Fumitaka Iga, Shoji Ikeda, Takahiro Hanyu, Hideo Ohno, and Tetsuo Endoh, "Time-Dependent Switching Characteristics of Magnetic Tunnel Junction (MTJ)", Asia-Pacific Workshop on Fundamentals and Applications of Advanced Semiconductor Devices (AWAD), 2B.7, pp. 167-170, Daejeon, Korea, June 29 - July 1, 2011.
  364. Moon-Sik Seo and Tetsuo Endoh, "FG Width Scalability of the 3-D vertical FG NAND with the Sidewall Control Gate (SCG)", Asia-Pacific Workshop on Fundamentals and Applications of Advanced Semiconductor Devices (AWAD), 1B.5, pp. 75-80, Daejeon, Korea, June 29 - July 1, 2011.
  365. Takahiro Shinada, Masahiro Hori, Yukinori Ono, Akira Komatsubara, Kuninori Kumagai, Takashi Tanii, Tetsuo Endoh, and Iwao Ohdomari, "Control of Dopant Distribution by Single-Ion Implantation and its Impact on Transconductance of FETs", Asia-Pacific Workshop on Fundamentals and Applications of Advanced Semiconductor Devices (AWAD), 1B.4, pp. 71-74, Daejeon, Korea, June 29 - July 1, 2011.
  366. Akihito Kobayashi, Hyoungjun Na and Tetsuo Endoh, "Study of Vertical MOSFET based MOS Current Mode Logic", Asia-Pacific Workshop on Fundamentals and Applications of Advanced Semiconductor Devices (AWAD), 1A.13, pp. 54-58, Daejeon, Korea, June 29 - July 1, 2011.
  367. Takeshi Sasaki and Tetsuo Endoh, "Suppression of Gate Leakage Current with Slim Pillar Type Vertical MOSFET", Asia-Pacific Workshop on Fundamentals and Applications of Advanced Semiconductor Devices (AWAD), 1A.9, pp. 36-40, Daejeon, Korea, June 29 - July 1, 2011.
  368. Masakazu Muraguchi and Tetsuo Endoh, "Theoretical Study on Current Path Control by Electrostatic Lens Effect in Vertical MOSFET", Asia-Pacific Workshop on Fundamentals and Applications of Advanced Semiconductor Devices (AWAD), 1A.8, pp. 30-35, Daejeon, Korea, June 29 - July 1, 2011.
  369. Takuya Imamoto and Tetsuo Endoh, "Device Desing of Body Channel Type Vertical MOSFET", Asia-Pacific Workshop on Fundamentals and Applications of Advanced Semiconductor Devices (AWAD), 1A.6, pp. 15-20, Daejeon, Korea, June 29 - July 1, 2011.
  370. R. Nebashi, N. Sakimura, Y. Tsuji, S. Fukami, H. Honjo, S. Saito, S. Miura, N. Ishiwata, K. Kinoshita, T. Hanyu, T. Endoh, N. Kasai, H. Ohno, and T. Sugibayashi, "A Content Addressable Memory Using Magnetic Domain Wall Motion Cells", 2011 Symposia on VLSI Technology and Circuits (VLSIC), pp. 300-301, Honolulu, HI , USA, June 15-17, 2011. [URL]
  371. Shoun Matsunaga, Akira Katsumata, Masanori Natsui, Shunsuke Fukami, Tetsuo Endoh, Hideo Ohno, and Takahiro Hanyu, "Fully Parallel 6T-2MTJ Nonvolatile TCAM with Single-Transistor-Based Self Match-Line Discharge Control", 2011 Symposia on VLSI Technology and Circuits (VLSIC), pp. 298-299, Honolulu, HI , USA, June 15-17, 2011. [URL]
  372. Tetsuo Endoh, "Will Emerging Non-Volatile Memories Finally Emerge?", 2011 Symposia on VLSI Technology and Circuits (VLSIC), Rump Sessions R-2, Honolulu, HI , USA, June 15-17, 2011.
  373. Tetsuo Endoh, "Impact of Spintronics Devices with Vertical MOSFET Technology for Future Nano-VLSI", 2011 CMOS Emerging Technologies Meeting, Session 6E, Whistler, Canada, June 15-17, 2011.
  374. Tetsuo Endoh, "3D CMOS Devices ?Why do we need them and challenges", 7th Annual SEMATECH Symposium Japan, Session 2, Tokyo, Japan, June 22, 2011.
  375. Tetsuo Endoh, "Research and Development of Ultra-low Power Spintronics based VLSIs", 7th International Nanotechnology Conference on Communication and Cooperation (INC 7), New York, USA, May 16-19, 2011.
  376. Hyoungjun Na and Tetsuo Endoh, "A New Compact SRAM Cell by Vertical MOSFET for Low-power and Stable Operation", The 3rd International Memory Workshop (IMW ), pp. 1-4, CA, USA, May 22-25, 2011. [DOI: 10.1109/IMW.2011.5873204]
  377. Moon-Sik Seo, Bong-Hoon Lee, Sung-kye Park and Tetsuo Endoh, "A Novel 3-D Vertical FG NAND Flash Memory Cell Arrays Using the Separated Sidewall Control Gate (S-SCG) for Highly Reliable MLC Operation", The 3rd International Memory Workshop (IMW ), pp. 61-64, CA, USA, May 22-25, 2011. [DOI: 10.1109/IMW.2011.5873208]
  378. Hiroki Koike and Tetsuo Endoh, "A New Sensing Scheme with High Signal Margin Suitable for Spin-Transfer Torque RAM", 2011 International Symposium on VLSI Technology, Systems and Applications (VLSI-TSA), pp. 1-2, Hsinchu, China, April 25-27, 2011.[DOI: 10.1109/VTSA.2011.5872230]
  379. Moon Sik Seo and Tetsuo Endoh, "New Design Method of the 3-Dimensional Vertical Stacked FG Type NAND Cell Arrays without the Interference Effect", 2011 International Symposium on VLSI Technology, Systems and Applications (VLSI-TSA), pp. 1-2, Hsinchu, China, April 25-27, 2011.[DOI: 10.1109/VTSA.2011.5872270]
  380. Tetsuo Endoh, Shoji Ikeda, Takahiro Hanyu, Naoki Kasai and Hideo Ohno, "Nonvolatile computer systems and memory hierarchy transformation with STT RAM technology," 1st CSIS International Symposium on Spintronics-based VLSIs and 7th RIEC International Workshop on Spintronics, February 3, 2011.
  381. Takahiro Hanyu, Shoun Matsunaga, Daisuke Suzuki, Masanori Natsui, Shoji Ikeda, Tetsuo Endoh and Hideo Ohno, "MTJ-based nonvolatile logic-in-memory architecture and its applications", 1st CSIS International Symposium on Spintronics-based VLSIs and 7th RIEC International Workshop on Spintronics, February 3, 2011.
  382. Tetsuo Endoh, "Spintronics-based VLSIs for Ultra Low power Nonvolatile Computer Systems", 9th International Symposium on Nanotechnology of International Nanotechnology Exhibition and Conference, Tokyo, Japan, February 18, 2011.
  383. Tetsuo Endoh,, Shoji Ikeda, Takahiro Hanyu, Naoki Kasai and Hideo Ohno, "Scalable STT RAM Technology for Low Power Systems", 2011 Samsung Semiconductor Future Technology Forum
  384. Tetsuo Endoh,, Shoji Ikeda, Takahiro Hanyu, Naoki Kasai and Hideo Ohno, "Sub-20nm STT-MRAM as a replacement for DRAM:Its Challenges and Opportunities", 2011 Samsung Semiconductor Future Technology Forum

    国内会議


  385. 高田幸宏,尹永択,塩川太郎,岩田潤一,小鍋哲,有川晃弘,村口正和,遠藤哲郎,初貝安弘,白石賢二, 「半導体中での波束ダイナミクスの印加電圧依存性」, 日本物理学会2011年秋季大会, 22aTM-3, Vol. 66, pp. 679, 富山大学, 2011年9月21日-24日. [URL]
  386. 塩川太郎, 高田幸宏, 尹永択, 岩田潤一, 小鍋哲, 有川晃弘, 村口正和, 遠藤哲郎, 初貝安弘, 白石賢二 , 「ハートリーフォック近似によるナノ構造中の電子波束ダイナミックス」, 日本物理学会2011年秋季大会, 21aTM-2, Vol. 66, pp. 666, 富山大学, 2011年9月21日-24日. [URL]
  387. 尹永択, 塩川太郎, 高田幸宏, 岩田潤一, 小鍋哲, 有川晃弘, 村口正和, 遠藤哲郎, 初貝安弘, 白石賢二, 「Suzuki-Trotter法による電子波束ダイナミックスの多体効果」, 日本物理学会2011年秋季大会, 21aTM-1, Vol. 66, pp. 666, 富山大学, 2011年9月21日-24日. [URL]
  388. 堀匡寛, Enrico Prati, Filippo, Guagliardo, 小野行徳, 小松原彰, 熊谷国憲, 谷井孝至, 遠藤哲郎, 大泊巌, 品田賢宏, 「単一イオン注入法による位置と個数を制御したデバイスの低温伝導特性評価」, 第72回 応用物理学会学術講演会,1p-P10?11, 山形大学, 2011年8月29日-31日.
  389. 小松原彰, 堀匡寛, 熊谷国憲, 小野行徳, 谷井孝至, 遠藤哲郎, 大泊巌, 品田賢宏, 「砒素イオン注入によるドーパント位置制御効果」, 第72回 応用物理学会学術講演会,1a-M-10, 山形大学, 2011年8月29日-31日.
  390. Akihito Kobayashi, Yitao Ma and Tetsuo Endoh, “Low-power sub-GHz Vertical MOSFET based MCML”, 2011 Tohoku-Section Joint Convention Record of Institutes of Electrical and Information Engineers, Section 1A02 , August 2011.
  391. Anyang Wang Kosuke Tanaka, Mitsuhiro Arikawa, Masakazu Muraguchi and Tetsuo Endoh, “Size Effect of Self-Heating in Vertical MOSFET”, 2011 Tohoku-Section Joint Convention Record of Institutes of Electrical and Information Engineers, Section 1A01 , August 2011.
  392. 羅炯竣, 遠藤哲郎, 「縦型MOSFETによる6Tr SRAMのAccess Timeの向上」, 第58回 応用物理学関係連合講演会,26a-KC-7,神奈川工科大学, 2011年3月24日-27日.
  393. 板垣明宏, 遠藤哲郎, 「Double Gate IMOSによるスイッチング特性」, 第58回 応用物理学関係連合講演会,26p-KD-10, 神奈川工科大学, 2011年3月24日-27日.
  394. 堀匡寛, 品田賢宏, 平圭吾, 小松原彰, 小野行徳, 谷井孝至, 遠藤哲郎, 大泊巌, 「ドーパント位置制御による電界効果トランジスタの相互コンダクタンス評価」, 第58回 応用物理学関係連合講演会,25a-P3-14,神奈川工科大学, 2011年3月24日-27日.
  395.    


    2010年(学術論文誌:23件;国際学会:36件;国内会議:19件。)



    学術論文誌


  396. Vipul Singh, Hiroshi Inokawa, Tetsuo Endoh and Hiroaki Satoh, "Fabrication Method of Sub-100 nm Metal?Oxide?Semiconductor Field-Effect Transistor with Thick Gate Oxide", Japanese Journal of Applied Physics (JJAP), Vol. 49, pp. 128002 (2 pages), December 2010. [DOI: 10.1143/JJAP.49.128002]
  397. 遠藤哲郎, 「メモリ階層構造の変化と不揮発性ロジックへの新展開」, 応用物理学会学会誌, 巻: 79, 号: 12, ページ: 1093-1097, 2010年12月10日. [DOI: ] -->
  398. Koji Sakui and Tetsuo Endoh, "A new vertical MOSFET ”Vertical Logic Circuit (VLC) MOSFET” suppressing asymmetric characteristics and realizing an ultra compact and robust logic circuit", Solid-State Electronics, Vol. 54, Issue 11, pp. 1457?1462, November 2010.[DOI: 10.1016/j.sse.2010.06.005]
  399. Koji Sakui and Tetsuo Endoh, "A high efficient, low power, and compact charge pump by vertical MOSFETs ", Solid-State Electronics, Vol. 54, Issue 10, pp. 1192-1196, October 2010. [DOI: 10.1016/j.sse.2010.05.016]
  400. M. Muraguchi, T. Endoh, Y. Takada, Y. Sakurai, S. Nomura, K. Shiraishi, M. Ikeda, K. Makihara, S. Miyazaki, Y. Shigeta, "Importance of Electronic State of Two-Dimensional Electron Gas for Electron Injection Process in Nano-Electronic Devices", Physica E: Low-dimensional Systems and Nanostructures, Vol. 42, Issue 10, pp. 2602-2605, September 2010.[DOI: 10.1016/j.physe.2009.12.025]
  401. Y. Takada, M. Muraguchi, T. Endoh, S. Nomura, K. Shiraishi, "Proposal of a new physical model for Ohmic contacts", Physica E: Low-dimensional Systems and Nanostructures, Vol. 42, Issue 10, pp. 2837-2840, September 2010. [DOI: 10.1016/j.physe.2010.02.011]
  402. Koji Sakui and Tetsuo Endoh, "A Compact Space and Efficient Drain Current Design for Multi-Pillar Vertical MOSFETs", IEEE Transaction on Electron Devices, Vol. 57, Issue 8, pp. 1768-1773, August 2010 [DOI: 10.1109/TED.2010.2050546]
  403. Shoun Matsunaga, Masanori Natsui, Kimiyuki Hiyama, Tetsuo Endoh, Hideo Ohno, and Takahiro Hanyu, "Fine-Grained Power-Gating Scheme of a Metal?Oxide?Semiconductor and Magnetic-Tunnel-Junction-Hybrid Bit-Serial Ternary Content-Addressable Memory", Japanese Journal of Applied Physics (JJAP), Vol. 49, pp. 04DM05 (5 pages), Aril 2010.[DOI: 10.1143/JJAP.49.04DM05]
  404. Tetsuo Endoh, Fumitaka Iga, Shoji Ikeda, Katsuya Miura, Jun Hayakawa, Masashi Kamiyanagi, Haruhiro Hasegawa, Takahiro Hanyu, and Hideo Ohno, "The Performance of Magnetic Tunnel Junction Integrated on the Back-End Metal Line of CMOS Circuits", Japanese Journal of Applied Physics (JJAP), Vol. 49, pp. 04DM06 (5 pages), Aril 2010. [DOI: 10.1143/JJAP.49.04DM06]
  405. Masakazu Muraguchi, Yoko Sakurai, Yukihiro Takada, Yasuteru Shigeta, Mitsuhisa Ikeda, Katsunori Makihara, Seiichi Miyazaki, Shintaro Nomura, Kenji Shiraishi and Tetsuo Endoh, "Collective Tunneling Model in Charge Trap Type NVM Cell", Japanese Journal of Applied Physics (JJAP), Vol. 50, pp. 04DD04 (4 pages), April, 2011. [DOI: 10.1143/JJAP.50.04DD04]
  406. Masashi Kamiyanagi, Fumitaka Iga, Shoji Ikeda, Katsuya Miura, Jun Hayakawa, Haruhiro Hasegawa, Takahiro Hanyu, Hideo Ohno and Tetsuo Endoh, "Transient characteristic of fabricated Magnetic Tunnel Junction (MTJ) programmed with CMOS circuit", IEICE Transacions on Electronics, Vol. E93-C, No. 5, pp. 602-607, May 2010. [URL]
  407. Masakazu Muraguchi, Yukihiro Takada, Shintaro Nomura, Tetsuo Endoh and Kenji Shiraishi, "Importance of the Electronic State on the Electrode in Electron Tunneling Processes between the Electrode and the Quantum Dot", IEICE Transacions on Electronics, Vol. E93-C, No. 5, pp. 563-568, May 2010. [URL]
  408. Tetsuo Endoh, Koji Sakui and Yukio Yasuda, "Sub-10nm Multi-Nano Pillar Type Vertical MOSFET", IEICE Transacions on Electronics, Vol. E93-C, No. 5, pp. 557-562, May 2010.[URL]
  409. Masakazu Muraguchi and Tetsuo Endoh, "Study on Quantum Electro-Dynamics in Vertical MOSFET", IEICE Transacions on Electronics, Vol. E93-C, No. 5, pp. 552-556, May 2010. [URL]
  410. Fumitaka Iga, Masashi Kamiyanagi, Shoji Ikeda, Katsuya Miura, Jun Hayakawa, Haruhiro Hasegawa, Takahiro Hanyu, Hideo Ohno, Tetsuo Endoh, "Study of the DC Performance of Fabricated Magnetic Tunnel Junction Integrated on Back-end Metal Line of CMOS Circuits", IEICE Transacions on Electronics, Vol. E93-C, No. 5, pp. 608-613, May 2010. [URL]
  411. Tetsuo Endoh, Koji Sakui, Yukio Yasuda, "Design of 30nm FinFETs and Double Gate MOSFETs with Halo Structure", IEICE Transacions on Electronics, Vol. E93-C, No. 5, pp. 534-539, May 2010. [URL]
  412. H. Nakazawa, A. Sudoh, M. Suemitsu, K. Yasui, T. Itoh, T. Endoh, Y. Narita, M. Mashita, "Mechanical and tribological properties of boron, nitrogen-coincorporated diamond-like carbon films prepared by reactive radio-frequency magnetron sputtering", Diamond and Related Material, Vol. 19, Issue 5-6, pp. 503-506, May?June 2010 [DOI: 10.1016/j.diamond.2010.01.026]
  413. Yoko Sakurai, Yukihiro Takada, Juin-Ichi Iwata, Kenji Shiraishi, Shintaro Nomura, Masakazu Muraguchi, Tetsuo Endoh, Yasuteru Shigeta, Mitsuhisa Ikeda, Katsunori Makihara and Seiichi Miyazaki, "Electron Tunneling between Si Quantum dots and Tow Dimensional Electron Gas under Optical Excitation at Low Temperatures", Electrochemical Society (ECS) Transactions, Vol. 28, Issue 1, pp. 369-374, April 2010. [DOI: 10.1149/1.3375623]
  414. Yukihiro Takada, Masakazu Muraguchi, Tetsuo Endoh, Shintaro Nomura and Kenji Shiraishi, "Investigation of the new physical model of Ohmic contact for future nano-scale contacts", Electrochemical Society (ECS) Transactions, Vol. 28, Issue 1, pp. 73-79, April 2010. [DOI: 10.1149/1.3375590]
  415. Vipul Singh, Hiroshi Inokawa, Tetsuo Endoh, Hiroaki Satoh, "Low Frequency Noise Characterization in Metal Oxide Semiconductor Field Effect Transistor Based Charge Transfer Device at Room and Low Temperatures", Japanese Journal of Applied Physics (JJAP), Vol. 49, pp. 034203 (4 pages), March 2010. [DOI: 10.1143/JJAP.49.034203]
  416. Y. Sakurai, S. Nomura, Y. Takada, J. Iwata, K. Shiraishi, M. Muraguchi, T. Endoh, Y. Shigeta, M. Ikeda, K. Makihara, S. Miyazaki, "Anomalous temperature dependence of electron tunneling between a two-dimensional electron gas and Si dots", Physica E: Low-dimensional Systems and Nanostructures, Vol. 42, Issue 4, pp. 918-921, February 2010. [DOI: 10.1016/j.physe.2009.11.120]
  417. Yoko Sakurai, Jun-ichi Iwata, Masakazu Muraguchi, Yasuteru Shigeta, Yukihiro Takada, Shintaro Nomura, Tetsuo Endoh, Shin-ichi Saito, Kenji Shiraishi, Mitsuhisa Ikeda, Katsunori Makihara and Seiichi Miyazaki , "Temperature Dependence of Electron Tunneling between Two Dimensional Electron Gas and Si Quantum Dots", Japanese Journal of Applied Physics (JJAP), Vol. 49, pp. 014001 (4 pages), Aril 2010. [DOI: 10.1143/JJAP.49.014001]
  418. H. Toyota, S. Fujie, M. Haneta, A. Mikami, T. Endoh, Y. Jinbo, N. Uchitomi, "Growth and characterization of GaSb/AlSb multiple quantum well structures on Si(111) and Si(001) substrates", Physics Procedia, Vol. 3, Issue 2, pp. 1345?1350, January 2010. [DOI: 10.1016/j.phpro.2010.01.189]


  419. 国際学会


  420. K. Nagata, K. Tamura, M. Suemitsu, Y. Narita, T. Ito, T. Endoh, H. Nakazawa, A.M. Hashim, K. Yasui, "Growth of GaN on SiC/Si substrates using AlN buffer layer under low III/V source gas ratio by hot-mesh CVD ", International Conference on Enabling Science and Nanotechnology (ESciNano), pp. 1-2, Kuala Lumpur, Malaysia, December 1-3, 2010. [DOI: 10.1109/ESCINANO.2010.5701027]
  421. Takahiro Shinada, Masahiro Hori, Yukinori Ono, Keigo Taira, Akira Komatsubara, Takashi Tanii, Tetsuo Endoh and Iwao Ohdomari, "Reliable Single Atom Doping and Discrete Dopant Effects on Transistor Performance", IEEE International Electron Device Meeting (IEDM), pp. 26.5.1-26.5.4, San Francisco, CA, USA, December 6-8, 2010. [DOI: 10.1109/IEDM.2010.5703428]
  422. Hideo Ohno, Tetsuo Endoh, Takahiro Hanyu, Naoki Kasai1 and Shoji Ikeda, "Magnetic Tunnel Junction for Nonvolatile CMOS Logic", IEEE International Electron Device Meeting (IEDM) , pp. 9.4.1-9.4.4, San Francisco, CA, USA, December 6-8, 2010. [DOI: 10.1109/IEDM.2010.5703329]
  423. Tetsuo Endoh, "Future High Density Memory with Vertical Structured Device Technology", IEEE International Conference on Solid-State and Integrated Circuit Technology (ICSICT), pp. 1051-1054, Shanghai China, November 1-4, 2010. [DOI: 10.1109/ICSICT.2010.5667541]
  424. Moon-Sik Seo and Tetsuo Endoh, "3D stack of FG type NAND Flash memory cell towards ultra high density storage memory", 4th Stanford and Tohoku Universities Joint Open Workshop on 3D Transistor and its Applications, Tokyo, Japan, November 5, 2010.
  425. Masakazu Muraguchi, Yoko Sakurai, Yukihiro Takada, Yasuteru Shigeta, Mitsuhisa Ikeda, Katsunori Makihara, Seiichi Miyazaki, Shintaro Nomura, Kenji Shiraishi and Tetsuo Endoh, "Collective Tunneling Model in Charge Trap Type NVM Cell", International Conference on. Solid State Devices and Materials (SSDM), E-3-2, pp. 750-751, Tokyo, Japan, September 22-24, 2010.
  426. Masato Kushibiki, Arisa Hara, Eiichi Nishimura and Tetsuo Endoh, "Fabrication of hp 25nm Si Pillar Using New Multiple Double Patterning Technique", International Conference on. Solid State Devices and Materials (SSDM), P-1-25L, pp. 233-234, Tokyo, Japan, September 22-24, 2010.
  427. Takeshi Sasaki, Takuya Imamoto and Tetsuo Endoh, "The Analysis of Temperature Dependency of the Mobility In High-k/Metal Gate MOSFET and the Performance on its CMOS Inverter", 2010 Asia-Pacific Workshop on Fundamentals and Applications of Advanced Semiconductor Devices (AWAD), 7A.4, pp. 177-182, Tokyo, Japan, June 30-July 2, 2010.
  428. Masashi Kamiyanagi, Takuya Imamoto, Takeshi Sasaki, Hyoungjun Na and Tetsuo Endoh, "Verification of Stable Circuit Operation of 180nm Current Controlled MOS Current Mode Logic under Threshold Voltage Fluctuation", 2011 Asia-Pacific Workshop on Fundamentals and Applications of Advanced Semiconductor Devices (AWAD), 7B.2, pp. 263-267, Tokyo, Japan, June 30-July 2, 2010.
  429. Tetsuo Endoh, Masashi Kamiyanagi, Masakazu Muragudhi, Takuya Imamoto and Takeshi Sasak, "The Impact of Current Controlled-MOS Current Mode Logic/Magnetic Tunnel Junction Hybrid Circuit for Stable and High-speed Operation", 2011 Asia-Pacific Workshop on Fundamentals and Applications of Advanced Semiconductor Devices (AWAD), 7B.1, pp. 257-262, Tokyo, Japan, June 30-July 2, 2010.
  430. Moon-Sik Seo and Tetsuo Endoh, "The optimum physical targets of the 3-dimensional vertical FG NAND flash memory cell arrays with the extended sidewall control gate (ESCG) structure", 2011 Asia-Pacific Workshop on Fundamentals and Applications of Advanced Semiconductor Devices (AWAD), 8A.6, pp. 225-230,Tokyo, Japan, June 30-July 2, 2010.
  431. Yuto Norifusa and Tetsuo Endoh, "Impact of Floating Body type DRAM with the Vertical MOSFET", 2011 Asia-Pacific Workshop on Fundamentals and Applications of Advanced Semiconductor Devices (AWAD), 8A.3, pp.211-216, Tokyo, Japan, June 30-July 2, 2010.
  432. Takuya Imamoto, Takeshi Sasaki and Tetsuo Endoh, "Evaluation of 1/f Noise Characteristics in High-k/Metal Gate and SiON/Poly-Si Gate MOSFET", 2011 Asia-Pacific Workshop on Fundamentals and Applications of Advanced Semiconductor Devices (AWAD), 7A.4, pp. 195-198, Tokyo, Japan, June 30-July 2, 2010.
  433. Tetsuo Endoh, Yasuhiko Suzuki, Takuya Imamoto and Hyoungjun Na, "Over 1GHz High-Speed Current Pulse Generation Circuit for Novel Nonvolatile Memory Cells", 2011 Asia-Pacific Workshop on Fundamentals and Applications of Advanced Semiconductor Devices (AWAD), 7B.6, pp. 283-288, Tokyo, Japan, June 30-July 2, 2010.
  434. Masakazu Muraguchi, Yoko Sakurai, Yukihiro Takada, Shintaro Nomura, Kenji Shiraishi, Mitsuhisa Ikeda, Katsunori Makihara, Seiichi Miyazaki, Yasuteru Shigeta and Tetsuo Endoh, "Study on Collective Electron Motion in Si-Nano Dot Floating Gate MOS Capacitor", 2011 Asia-Pacific Workshop on Fundamentals and Applications of Advanced Semiconductor Devices (AWAD), 9B.4, pp. 319-324, Tokyo, Japan, June 30-July 2, 2010.
  435. Masakazu Muraguchi and Tetsuo Endoh, "Study on Impurity Distribution Dependence of Electron-Dynamics in Vertical MOSFET", 2011 Asia-Pacific Workshop on Fundamentals and Applications of Advanced Semiconductor Devices (AWAD),9B.2, pp. 309-313, Tokyo, Japan, June 30-July 2, 2010.
  436. Y. Takada, M. Muraguchi, T. Endoh, S. Nomura and K. Shiraishi, "Investigation of I-V characteristics in a new electronic structure model of the Ohmic contact for future nano-scale Ohmic contact", International Symposium on Technology Evolution for Silicon Nano-Electronics (ISTESNE), P-20, pp. 58, Tokyo, Japan, June 3-5, 2010.
  437. M. Muraguchi, Y. Sakurai, Y. Takada, Y Shigeta, M. Ikeda, K. Makihara, S. Miyazaki, S. Nomura, K. Shiraishi and T. Endoh, "Collective Electron Tunneling Model in Si-Nano Dot Floating Gate MOS Structure", International Symposium on Technology Evolution for Silicon Nano-Electronics (ISTESNE), P-37, pp. 75, Tokyo, Japan, June 3-5, 2010.
  438. Y. Takada, M. Muraguchi, T. Endoh, S. Nomura, K. Shiraishi, "Proposal of a new electronic structure model of Ohmic contacts for the future metallic source and drain ", International Workshop on Junction Technology (IWJT), pp. 1-4, Shanghai, China, May10-11, 2010. [DOI: 10.1109/IWJT.2010.5474985]
  439. Masakazu Muraguchi, Yoko Sakurai, Yukihiro Takada, Shintaro Nomura, Kenji Shiraishi, Mitsuhisa Ikeda, Katsunori Makihara, Seiichi Miyazaki, Yasuteru Shigeta and Tetsuo Endoh, "Bias Voltage Sweep Speed Dependence of Electron Injection in Si-Nano-Dots Floating Gate MOS Capacitor", International Meeting for Future of Electron Devices, Kansai (IMFEDK), B-2, pp. 48-49, Takatsuki, Japan, May13-14, 2010.
  440. Takeshi Sasaki, Takuya Imamoto and Tetsuo Endoh, "Dependency of Driving Current on Channel Width in High-k/Metal Gate MOSFET", International Meeting for Future of Electron Devices, Kansai (IMFEDK), A-3, pp. 34-35, Takatsuki, Japan, May13-14, 2010.
  441. Takuya Imamoto, Takeshi Sasaki and Tetsuo Endoh, "Sub-threshold Characteristics of High-k/Metal Gate MOSFET", International Meeting for Future of Electron Devices, Kansai (IMFEDK), A-2, pp. 32-33, Takatsuki, Japan, May13-14, 2010.
  442. Koji Sakui and Tetsuo Endoh, "Design Impacts on NAND Flash Memory Core Circuits with Vertical MOSFETs", IEEE International Memory Workshop (IMW), pp. 1-4, Seoul, Korea, May 16-19, 2010. [DOI: 10.1109/IMW.2010.5488310]
  443. Moon-Sik Seo, Sung-Kye Park and Tetsuo Endoh, "The 3-dimensional vertical FG NAND flash memory cell arrays with the novel electrical S/D technique using the extended sidewall control gate (ESCG)", IEEE International Memory Workshop (IMW), pp. 1-4, Seoul, Korea, May 16-19, 2010. [DOI: 10.1109/IMW.2010.5488392]
  444. Koji Sakui and Tetsuo Endoh, "A compact and low power logic design for multi-pillar vertical MOSFETs", IEEE International Symposium on Circuits and Systems (ISCAS), A2L-C, pp. 309-312, Paris, France, May 30-June2, 2010. [DOI: 10.1109/ISCAS.2010.5537837]
  445. Hideyuki Toyota, Akihiro Mikami, Tetsuo Endoh, Yoshio Jinbo and Naotaka Uchitomi, "Growth and characterization of GaSb/ AlSb multiple quantum well structures on Si (111) substrates", The 37 International Symposium on Compound Semiconductors (ISCS), MoP16, Kagawa, Japan, May 31-June 4, 2010.
  446. Tetsuo Endoh, "Spin Transfer Torque MRAM (SPRAM) and its applications", The International Technology Roadmap for Semiconductors (ITRS)-Emerging Research Material (ERM)/Emerging Research Device (ERD)-Emerging Research Memory Technologies Workshop, Italia, April 6, 2010.
  447. Tetsuo Endoh, "Impact of Vertical Devices for Future Nano LSI", 2010 Materials Research Society (MRS) Spring Meeting, I7-1, San Francisco, CA, USA, April 5-9, 2010.
  448. T. Shinada, M. Hori, Y. Ono, K.Taira, A. Komatsubara, T.Tanii, T. Endoh, I. Ohdomari, "Performance evaluation of MOSFETs with discrete dopant distribution by one-by-one doping method", Proceedings of SPIE, Alternative Lithographic Technologies II, vol. 7637, pp. 763711 (7 pages), April 2, 2010.[DOI: 10.1117/12.848322]
  449. Kenji Ohmori, Takeo Matsuki, Yasuyuki Ohkura, Jiro Yugami, Kazuto Ikeda, Yuzuru Ohji, Yukio Yasuda, Tetsuo Endoh, Kenji Shiraishi and Keisaku Yamada, "Effect of Carrier Scattering Phenomena on Drain Current Variability in Si MOSFETs", 217th Electrochemical Society (ECS) Meeting, E1, pp. 918, Vancouver, Canada, April 25-30, 2010. [URL]
  450. Yoko Sakurai, Yukihiro Takada, Juin-Ichi Iwata, Kenji Shiraishi, Shintaro Nomura, Masakazu Muraguchi, Tetsuo Endoh, Yasuteru Shigeta, Mitsuhisa Ikeda, Katsunori Makihara and Seiichi Miyazaki, "Electron Tunneling between Si Quantum dots and Tow Dimensional Electron Gas under Optical Excitation at Low Temperatures", 217th Electrochemical Society (ECS) Meeting, E1, pp. 962, Vancouver, Canada, April 25-30, 2010. [URL]
  451. Yukihiro Takada, Masakazu Muraguchi, Tetsuo Endoh, Shintaro Nomura and Kenji Shiraishi, "Investigation of the new physical model of Ohmic contact for future nano-scale contacts", 217th Electrochemical Society (ECS) Meeting, E1, pp. 923, Vancouver, Canada, April 25-30, 2010. [URL]
  452. Koji Sakui and Tetsuo Endoh, "A Compact, High-Speed, and Low-Power Design for Multi-Pillar Vertical MOSFET’s, Suppressing Characteristic Influences by Process Fluctuation", International Symposium on VLSI Technology, Systems an applications (VLSI-TSA), pp. 30-31, Hsinchu, China, April 26-28, 2010. [DOI: 10.1109/VTSA.2010.5488961]
  453. Koji Sakui and Tetsuo Endoh, "A unique and accurate extraction technique of the asymmetric bottom-pillar resistance for the vertical MOSFET", IEEE International Conference on Microelectronic Test Structures (ICMTS), pp. 220 - 224, Hiroshima , Japan, March 22-25, 2010. [DOI: 10.1109/ICMTS.2010.5466812]
  454. Tetsuo Endoh, "Impact of Vertical Structured Devices and Spintronic Devices for Future Nano LSI", SEMICON Korea 2010, S3-6, Seoul, Korea, February 3-5 2010.
  455. Tetsuo Endoh, "Current status of NAND flash memory and future prospect of the next generation nonvolatile semiconductor memory for new storage systems", 11th Joint MMM-intermag Conference, HA-05, Washington DC, USA, January 18-22, 2010.

    国内会議


  456. 今本拓也, 佐々木健志, 遠藤哲郎, 「SiON/Poly-Si NMOSFETの飽和領域における1/fノイズ特性」,第71回応用物理学会学術講演会, 14a-ZE-12, 長崎大学, 長崎, 2010年9月13日.
  457. 村口正和, 遠藤哲郎 , 「縦型構造MOSFETおよびFINFETにおける10nmチャネル領域への電子注入に及ぼす不純物位置効果」,第71回応用物理学会学術講演会, 14a-ZE-13, 長崎大学, 長崎, 2010年9月13日.
  458. 板垣明宏, 遠藤哲郎, 「I-MOSのS-Factor特性に対するi型領域長依存性」, 第71回応用物理学会学術講演会, 15a-ZE-5, 長崎大学, 長崎, 2010年9月13日.
  459. 佐々木健志, 今本拓也, 遠藤哲郎, 「High-k/Metal Gate nMOSFETにおける駆動電流の温度依存特性」, 第71回応用物理学会学術講演会, 15a-ZE-6, 長崎大学, 長崎, 2010年9月13日.
  460. 徐文植, 遠藤哲郎, 「The Scalability of FG width of the 3-dimensional vertical FG NAND flash memory cell arrays with the Extended Sidewall Control Gate (ESCG) structure」, 第71回応用物理学会学術講演会, 17a-ZE-4, 長崎大学, 長崎, 2010年9月13日.
  461. 則房勇人, 遠藤哲郎, 「Study of Retention Characteristics of Vertical type 1T-DRAM」,第71回応用物理学会学術講演会, 17a-ZE-10, 長崎大学, 長崎, 2010年9月13日.
  462. 羅炯竣, 鈴木保彦, 今本拓也, 遠藤哲郎, 「1GHz以上の高速電流パルス生成回路を有する2ステッププログラム手法のベースパルス特性」, 第70回応用物理学会学術講演会, 17a-ZE-11, 長崎大学, 長崎, 2010年9月13日.
  463. 羅炯竣, 遠藤哲郎, 「Current Controlled MOS Current Mode Logicによる出力基準電圧の安定化」, 第71回応用物理学会学術講演会, 17a-ZE-12, 長崎大学, 長崎, 2010年9月14日.
  464. 堀匡寛, 小松原彰, 品田賢宏, 小野行徳, 平圭吾, 谷井孝至, 遠藤哲郎, 大泊巌, 「基板バイアス印加による単一-イオン個数制御性の検証」, 第71回応用物理学会学術講演会, 16a-ZD-3, 長崎大学, 長崎, 2010年9月14日.
  465. 遠藤哲郎, 「構造融合・機能融合によるシリコンテクノロジーの新展開-シリコンテクノロジーの未来像を徹底的に考える」,第71回応用物理学会学術講演会, 16p-ZE-8, 長崎大学, 長崎, 2010年9月14日.
  466. 遠藤哲郎, 「縦型MOSFET技術に基づく3次元集積回路とその将来展望」,技術戦略委員会省電力エレクトロニクス技術分科会, 電子情報技術産業協会技報, 2010年9月10日.
  467. 村口正和, 遠藤哲郎, 「縦型構造MOSFET およびFINFET における10nm チャネル領域への電子注入過程の研究」, 電気関係学会東北支部連合大会, 1I07, pp. 283, 2010年08月26日-27日.
  468. Takuya Imamoto, Takeshi Sasaki and Tetsuo Endoh, 「New Phenomena in the Dependency of 1/f Noise Characteristics on Temperature for SiON/Poly-Si Gate N-type MOSFET」, TOHOKU-SECTION JOINT CONVENTION RECORD OF ELECTRICAL AND INFORMATION ENGINEERS, 1A06, pp. 6, August 26-27, 2010.
  469. Yuto Norifusa, Tetsuo Endoh, "Disturb Characteristics of Vertical type 1T-DRAM", TOHOKU-SECTION JOINT CONVENTION RECORD OF ELECTRICAL AND INFORMATION ENGINEERS, 1A11, pp. 6, August 26-27, 2010.
  470. Hyoungjun Na, Yasuhiko Suzuki, Takuya Imamoto and Tetsuo Endoh, "Base Pulse Characteristics of 2 Step Program Method with Over 1GHz High-Speed Current Pulse Generation Circuit", TOHOKU-SECTION JOINT CONVENTION RECORD OF ELECTRICAL AND INFORMATION ENGINEERS, 1A10, pp. 6, August 26-27, 2010.
  471. Hyoungjun Na and Tetsuo Endoh, "Improvement of Differential-Mode Voltage Gain by Current Controlled MOS Current Mode Logic", TOHOKU-SECTION JOINT CONVENTION RECORD OF ELECTRICAL AND INFORMATION ENGINEERS, 1A09, pp. 6, August 26-27, 2010.
  472. Moon-Sik Seo and Tetsuo Endoh, "The interference characteristics of the 3-dimensional vertical FG NAND flash memory cell arrays with the Extended Sidewall Control Gate (ESCG) structure", TOHOKU-SECTION JOINT CONVENTION RECORD OF ELECTRICAL AND INFORMATION ENGINEERS, 1A07, pp. 6, August 26-27, 2010.
  473. 鈴木大輔, 夏井雅典, 池田正二, 長谷川晴弘, 三浦勝哉, 早川純, 遠藤哲郎, 大野英男, 羽生貴弘, 「Fabrication of a Nonvolatile Lookup-Table Circuit Chip Using Magneto/Semiconductor- Hybrid Structure for an Immediate-Power-Up Field Programmable Gate Array」,電子情報通信学会技術研究報告. ICD, 集積回路, 巻110, 号 9, ページ47-52, 2010年4月15日. [URL]
  474. 村口正和, 高田幸宏, 櫻井蓉子, 野村晋太郎, 白石賢二, 牧原克典, 池田弥央, 宮崎誠一, 重田育照, 遠藤哲郎, 「2次元電子ガス-量子ドット界面における電子トンネル過程に対する微視的考察」,日本物理学会第65回年次大会講演概要集, 21aHV-13, pp. 713, 岡山大学, 2010年3月20日~23日. [URL]
  475.    
         

    2009年(学術論文誌:12件;国際学会:24件;国内会議:14件。)



    学術論文誌


  476. H. Nakazawa, T. Kinoshita, Y. Kaimori, Y. Asai, M. Suemitsu, T. Abe, K. Yasui, T. Endoh, T. Itoh, Y. Narita, Y. Enta, M. Mashita, "Effects of Silicon Source Gas and Substrate Bias on the Film Properties of Si-Incorporated Diamond-Like Carbon by Radio-Frequency Plasma-Enhanced Chemical Vapor Deposition," Japanese Journal of Applied Physics (JJAP), Vol. 48, pp. 116002 (8 pages), November 2009. [DOI: 10.1143/JJAP.48.116002]
  477. Yoko Sakurai, Shintaro Nomura, Yukihiro Takada, Jun-ichi Iwata, Kenji Shiraishi, Masakazu Muraguchi, Tetsuo Endoh, Yasuteru Shigeta, Mitsuhisa Ikeda, Katsunori Makihara and Seiichi Miyazaki, "Physics of Nano-contact between Si Quantum Dots and Inversion Layer", Electrochemical Society (ECS) Transactions, Vol. 25, Issue 7, pp. 463-469, October 2009. [DOI: 10.1149/1.3203984]
  478. M. Hori, T. Shinada, K. Taira, N. Shimamoto, T. Tanii, T. Endoh and I. Ohdomari, "Performance enhancement of semiconductor devices by control of discrete dopant distribution", IOP PUBLISHING Nanotechnology, Vol 20, No. 36, pp. 365205 (5 pages), August 2009. [DOI: 10.1088/0957-4484/20/36/365205]
  479. Yasuaki Komae, Kanji Yasui, Maki Suemitsu, Tetsuo Endoh, Takashi Ito, Hideki Nakazawa, Yuzuru Narita, Masasuke Takata, Tadashi Akahane, "Epitaxial Growth of GaN Films by Pulse-Mode Hot-Mesh Chemical Vapor Deposition," Japanese Journal of Applied Physics (JJAP), Vol. 48, pp. 76509 (5pages), July 2009. [DOI: 10.1143/JJAP.48.076509]
  480. Yu Miyamoto, Hiroyuki Handa, Eiji Saito, Atsushi Konno, Yuzuru Narita, Maki Suemitsu, Hirokazu Fukidome, Takashi Ito, Kanji Yasui, Hideki Nakazawa, Tetsuo Endoh, "Erratum: Raman-Scattering Spectroscopy of Epitaxial Graphene Formed on SiC Film on Si Substrate", e-Journal of Surface Science and Nanotechnology, Vol. 7, pp. 699, June 2009. [DOI: 10.1380/ejssnt.2009.699]
  481. H. Nakazawa, H. Sugita, Y. Enta, M. Suemitsu, K. Yasui, T. Itohb, T. Endoh, Y. Narita, M. Mashita, "Atomic hydrogen etching of silicon-incorporated diamond-like carbon films prepared laser deposition", Diamond and Related Materials, Vol. 18, Issue, 5-8 pp. 831-834, May?August 2009. [DOI: 10.1016/j.diamond.2008.10.043]
  482. Tetsuo Endoh and Yuto Norifusa, "Scalability of Vertical MOSFETs in Sub-10 nm generation and its Mechanism," IEICE TRANSACTIONS on Electronics, Vol.E92-C No.5 pp.594-597, May 2009. [DOI: 10.1587/transele.E92.C.594]
  483. Tetsuo Endoh and Masashi Kamiyanagi, "Novel Concept Dynamic Feedback MCML Technique for High-Speed and High-Gain MCML Type Latch," IEICE TRANSACTIONS on Electronics, Vol.E92-C No.5 pp.603-607, May 2009. [DOI: 10.1587/transele.E92.C.603]
  484. Tetsuo Endoh and Yuto Norifusa, "Study of Self-Heating Phenomena in Si Nano Wire MOS Transistor," IEICE TRANSACTIONS on Electronics, Vol.E92-C No.5 pp.598-602, May 2009. [DOI: 10.1587/transele.E92.C.598]
  485. Yasuaki Komae, Takeshi Saitou, Maki Suemitsu, Takashi Ito, Tetsuo Endoh, Hideki Nakazawa, Yuzuru Narita, Masasuke Takata, Tadashi Akahane, Kanji Yasui, "The growth of GaN films by alternate source gas supply hot-mesh CVD method", Thin Solid Films, Vol. 517, Issue 12, pp. 3528?3531, April 2009. [DOI: 10.1016/j.tsf.2009.01.021]
  486. Yu Miyamoto, Hiroyuki Handa, Eiji Saito, Atsushi Konno, Yuzuru Narita, Maki Suemitsu, Hirokazu Fukidome, Takashi Ito, Kanji Yasui, Hideki Nakazawa, Tetsuo Endoh, "Raman-Scattering Spectroscopy of Epitaxial Graphene Formed on SiC Film on Si Substrate", e-Journal of Surface Science and Nanotechnology, Vol. 7, pp. 107-109, February 2009. [DOI: 10.1380/ejssnt.2009.107]
  487. Shoun Matsunaga, Kimiyuki Hiyama, Atsushi Matsumoto, Shoji Ikeda, Haruhiro Hasegawa, Katsuya Miura, Jun Hayakawa, Tetsuo Endoh, Hideo Ohno, and Takahiro Hanyu, "Standby-Power-Free Compact Ternary Content-Addressable Memory Cell Chip Using Magnetic Tunnel Junction Devices," Applied Physics Express (APEX), Vol. 2, pp. 023004 (3 pages), February 2009. [DOI: 10.1143/APEX.2.023004]


  488. 国際学会


  489. K. Sakui and T. Endoh, "A High Efficient, Low Power, and Compact Charge Pump by Vertical MOSFET’s," International Semiconductor Device Research Symposium (ISDRS), WP9-07-17, pp. 1-2, College Park, MD, USA, December 9-11, 2009. [DOI: 10.1016/j.sse.2010.05.016]
  490. -->
  491. S. Nomura, Y. Sakurai, Y. Takada, K. Shiraishi, M. Muraguchi, T. Endoh, M. Ikeda, K. Makihara and S. Miyazaki, "Physics of Nano-contact between Si Quantum Dots and Inversion Layer," 216th Electrochemical Society (ECS) Meeting, pp. 2403, Vienna, Austria, October 4-9, 2009. [URL]
  492. -->
  493. M. Muraguchi, Y.Sakurai, Y. Takada, Y. Shigeta, M. Ikeda, K. Makihara, S. Miyazaki, S. Nomura, K. Shiraishi and T. Endoh, "New Tunneling Model with Dependency of Temperature Measured in Si Nano-Dot Floating Gate MOS Capacitor," International Conference on. Solid State Devices and Materials (SSDM), K-2-1, pp.274-275, Sendai, Japan, October 7-9, 2009.
  494. K. Sakui and T. Endoh, "A Compact Space and Efficient Drain Current Design for Multi-Pillar Vertical MOSFET’s," International Conference on. Solid State Devices and Materials (SSDM), E-3-1L, pp. 806-807, Sendai, Japan, October 7-9, 2009.
  495. T. Endoh, F. Iga, S. Ikeda, K. Miura, J. Hayakawa, M. Kamiyanagi, H. Hasegawa, T. Hanyu and H. Ohno, "The Performance of Magnetic Tunnel Junction Integrated on the Back-end Metal Line of CMOS Circuits," International Conference on. Solid State Devices and Materials (SSDM), K-7-6,pp. 1394-1395, Sendai, Japan, October 7-9, 2009.
  496. H. Nakazawa, A. Sudoh, M. Suemitsu, K. Yasui, T. Itoh, T. Endoh, Y. Narita, M. Mashita, "Mechanical and Tribological Properties of Boron, Nitrogen-Coincorporated Diamond-Like Carbon Films Prepared by Reactive Radio-Frequency Magnetron Sputtering," 20th European Conference on Diamond, Diamond-Like Materials, Carbon Nanotubes, and Nitrides (Diamond), Athens, Greece, September 6-10 2009.
  497. M. Muraguchi, T. Endoh, Y. Takada, Y. Sakurai, S. Nomura, K. Shiraishi, M. Ikeda, K. Makihara, S. Miyazaki, Y. Shigeta, "Importance of Electronic State of Two-Dimensional Electron Gas for Electron Injection Process in Nano-Electronic Devices," 18th Electronic Properties of Two-Dimensional Systems (EP2DS-18) 14th Modulated Semiconductor Structures (MSS-14) Joint Conference, Tu-mP22, Kobe, Japan, July 19 - 24, 2009.
  498. Y. Takada, M. Muraguchi, T. Endoh, S. Nomura, K. Shiraishi, "Proposal of a new physical model for Ohmic contacts," 18th Electronic Properties of Two-Dimensional Systems (EP2DS-18) 14th Modulated Semiconductor Structures (MSS-14) Joint Conference, Th-mP32, Kobe, Japan, July 19 - 24, 2009.
  499. Y. Sakurai, S. Nomura, Y. Takada, K. Shiraishi, M. Muraguchi, T. Endoh, Y. Shigeta, M. Ikeda, K. Makihara, S. Miyazaki, "Anomalous temperature dependence of electron tunneling," 18th Electronic Properties of Two-Dimensional Systems (EP2DS-18) 14th Modulated Semiconductor Structures (MSS-14) Joint Conference, Mo-eP49, Kobe, Japan, July 19 - 24, 2009.
  500. D. Suzuki, M. Natsui, S. Ikeda, H. Hasegawa, K. Miura, J. Hayakawa, T. Endoh, H. Ohno, T. Hanyu, "Fabrication of a Nonvolatile Lookup-Table Circuit Chip Using Magneto/Semiconductor-Hybrid Structure for an Immediate-Power-Up Field Programmable Gate Array," 2009 Symposia on VLSI Circuits, Session8-2, pp. 80-81, Kyoto, Japan, June 16-18, 2009. [URL]
  501. Masashi Kamiyanagi, Fumitaka Iga, Shoji Ikeda, Katsuya Miura, Jun Hayakawa, Haruhiro Hasegawa, Takahiro Hanyu, Hideo Ohno, Tetsuo Endoh, "Transient characteristic of fabricated Magnetic Tunnel Junction (MTJ) programmed with CMOS circuit," 2009 Asia-Pacific Workshop on Fundamentals and Applications of Advanced Semiconductor Devices (AWAD), 1A-3, Busan, Korea, June 24-26, 2009.
  502. Fumitaka Iga, Masashi Kamiyanagi, Shoji Ikeda, Katsuya Miura, Jun Hayakawa, Haruhiro Hasegawa, Takahiro Hanyu, Hideo Ohno, Tetsuo Endoh, "Study of the DC Performance of Fabricated Magnetic Tunnel Junction Integrated on Back-end Metal Line of CMOS Circuits," 2009 Asia-Pacific Workshop on Fundamentals and Applications of Advanced Semiconductor Devices (AWAD), 1A-4, Busan, Korea, June 24-26, 2009.
  503. Tetsuo Endoh, Hyoung-Jun Na, "Current controlled MOS current mode logic with auto-detection of threshold voltage fluctuation," 2009 Asia-Pacific Workshop on Fundamentals and Applications of Advanced Semiconductor Devices (AWAD), 1A-6, Busan, Korea, June 24-26, 2009.
  504. Masakazu Muraguchi, Yukihiro Takada, Shintaro Nomura, Tetsuo Endoh, Kenji Shiraishi, "Importance of the Electronic State on the Electrode in Electron Tunneling Processes between the Electrode and the Quantum Dot," 2009 Asia-Pacific Workshop on Fundamentals and Applications of Advanced Semiconductor Devices (AWAD), 3A-8, Busan, Korea, June 24-26, 2009.
  505. Tetsuo Endoh, Koji Sakui, Yukio Yasuda, "Sub-10nm Multi-Nano Pillar Type Vertical MOSFET," 2009 Asia-Pacific Workshop on Fundamentals and Applications of Advanced Semiconductor Devices (AWAD), 2B-11, Busan, Korea, June 24-26, 2009.
  506. Masakazu Muraguchi, Tetsuo Endoh, "Study on Quantum Electro-Dynamics in Vertical MOSFET," 2009 Asia-Pacific Workshop on Fundamentals and Applications of Advanced Semiconductor Devices (AWAD), 2B-10, Busan, Korea, June 24-26, 2009.
  507. Tetsuo Endoh, "Impact of Vertical Structured Devices for Future Nano LSI," 2009 Lithography Workshop, Session5-2, Coeur d’Alene, Idaho, USA, June 28-July 2, 2009.
  508. Masashi Kamiyanagi, Tetsuo Endoh, "The Stable Circuit Operation of Current Controlled MCML against Fluctuation of Supplied Voltage," The 2009 International Meeting for Future Electron Devices, Kansai (IMFEDK), SC-7, Osaka, Japan, May 14-15, 2009.
  509. Masakazu Muraguchi, Yukihiro Takada, Shintaro Nomura, Kenji Shiraishi, Tetsuo Endoh, "Study of Electronic State in Electrode for Nano-Electronic Devices," The 2009 International Meeting for Future Electron Devices, Kansai (IMFEDK), B-5, pp. 46-47, Osaka, Japan, May 14-15, 2009.
  510. Fumitaka Iga, Tetsuo Endoh, "Evaluation of Time-Dependent Power Consumption in SONOS type MOS diode during Program Operation by using Pulsed IV system," The 2009 International Meeting for Future Electron Devices, Kansai (IMFEDK), C-4, pp. 60-61, Osaka, Japan, May 14-15, 2009.
  511. Tetsuo Endoh, Kazuhiro Suzuki, Masashi Kamiyanagi, Masakazu Muraguchi, "Study of Stability of MOS Current Mode Logic NAND Circuit on Input Timimg Fluctuation," The 2009 International Meeting for Future Electron Devices, Kansai (IMFEDK), C-3, pp. 58-59, Osaka, Japan, May 14-15, 2009.
  512. Masakazu Muraguchi, Tetsuo Endoh , Yoko Sakurai , Shintaro Nomura , Yukihiro Takada , Kenji Shiraishi , Mitsuhisa Ikeda , Katsunori Makihara , Seiichi Miyazaki , Yasuteru Shigeta, "New insight into Tunneling Process between Quantum Dot and Electron Gas," America Physical Society 2009 March Meeting, V11-9, Pittsburgh, Pennsylvania, USA, March 16?20, 2009.
  513. Yoko Sakurai, Shintaro Nomura , Yukihiro Takada , Kenji Shiraishi , Masakazu Muraguchi , Tetsuo Endoh , Mitsuhisa Ikeda , Katsunori Makihara , Seiichi Miyazaki, "Temperature Dependence of Electron Tunneling between Quantum Dots and Electron Gas," America Physical Society 2009 March Meeting, V11-9, Pittsburgh, Pennsylvania, USA, March 16?20, 2009.
  514. Koji Sakui and Tetsuo Endoh, "Stacked type NAND cell technology", 3rd Stanford and Tohoku Universities Joint Open Workshop on 3D Transistor and its Applications, California, USA, December 4, 2009.

    国内会議


  515. 櫻井蓉子, 高田幸宏, 野村晋太郎, 白石賢二, 村口正和, 遠藤哲郎, 池田弥央, 牧原克典, 宮崎誠一, 「光励起下における電子ガス-量子ドット結合系のC-V特性とI-V特性」, 日本物理学会2009年秋季大会, 26aXG-13, 熊本大学, 2009年9月25日-28日. [URL]
  516. 多川知希, 武田京三郎, 村口正和, 遠藤哲郎, 「量子ドットに閉じ込められた電子-電子,電子-正孔対の第一原理動力学」, 日本物理学会2009年秋季大会, 25pPSB-7, 熊本大学, 2009年9月25日-28日. [URL]
  517. 村口正和, 遠藤哲郎, 杉山功太, 多川知希, 奧西拓馬, 武田京三郎, 「円-リング複合型量子ドットにおけるFloquet状態」, 日本物理学会2009年秋季大会, 25pPSB-6, 熊本大学, 2009年9月25日-28日. [URL]
  518. F. Iga, H. Ohno and T. Endoh, "Stability of Magnetic Tunnel Junction Integrated on CMOS Circuit", 2009 Tohoku-Section Joint Convention of Institutes of Electrical and Information Engineers, 2A22, Tohoku Bunka Gakuen University, Sendai, August 20-21, 2009.
  519. T. Sasaki, T. Imamoto and T. Endoh, "Evaluation of Drive Current of p-MOSFET with High-k Dielectric as a Gate Insulator for High-Performance CMOS Applications", 2009 Tohoku-Section Joint Convention of Institutes of Electrical and Information Engineers, 2A01, Tohoku Bunka Gakuen University, Sendai, August 20-21, 2009.
  520. T. Imamoto, T. Sasaki and T. Endoh, "Evaluation of Drive Current of Hf-based High-k n-type MOSFET with p+poly-Si or Metal Gate Electrode", 2009 Tohoku-Section Joint Convention of Institutes of Electrical and Information Engineers, 2A02, Tohoku Bunka Gakuen University, Sendai, August 20-21, 2009.
  521. 村口正和, 遠藤哲郎, 「縦型構造MOSFETにおけるチャネル中への電子注入過程に対する理論的研究」, 2009 Tohoku-Section Joint Convention of Institutes of Electrical and Information Engineers, 1D04, Tohoku Bunka Gakuen University, Sendai, August 20-21, 2009.
  522. M. Kamiyanagi and T. Endoh, "Control Theory of CC-MCML Inverter for Stable Operation under Fluctuation of Supplied Voltage", 2009 Tohoku-Section Joint Convention of Institutes of Electrical and Information Engineers, 2A03, Tohoku Bunka Gakuen University, Sendai, August 20-21, 2009.
  523. 齋藤健,永田一樹,西山洋,末光眞希,伊藤隆,遠藤哲郎,中澤日出樹,成田克,高田雅介,赤羽正志,安井寛治, 「間欠ガス供給を用いたホットメッシュCVD法によるSi上GaNエピタキシャル成長」, 電子情報通信学会電子部品・材料(CPM)研究会, vol. 109, no. 171, CPM2009-45, pp. 61-66, 2009年8月.[URL]
  524. 三浦創史、中澤日出樹、西崎圭太、末光眞希、安井寛治、伊藤隆、遠藤哲郎、成田克, 「有機シランを用いたプラズマCVD法によるダイヤモンドライクカーボン薄膜の膜特性評価」, 電子情報通信学会電子部品・材料(CPM)研究会, vol. 109, no. 171, CPM2009-36, pp. 13-18, 2009年8月.[URL]
  525. 村口正和, 遠藤哲郎, 櫻井蓉子,  野村晋太郎, 高田幸宏, 白石賢二, 池田弥央, 牧原克典, 宮崎誠一, 斉藤慎一, 「電子ガスー量子ドット結合系における電子ダイナミクスⅡ」, 日本物理学会2009年春季大会, 30pTX-3, 立教大学, 2009年3月28日. [URL]
  526. 櫻井蓉子,野村晋太郎,高田幸宏,白石賢二,村口正和,遠藤哲郎,池田弥央,牧原克典,宮崎誠一, 「電子ガスー量子ドット結合系におけるCーV特性およびIーV特性のSweep Rate依存性」, 日本物理学会2009年春季大会, 30pTX-2, 立教大学, 2009年3月28日. [URL]
  527. 高田幸宏、櫻井蓉子、村口正和、池田弥央、牧原克典、宮崎誠一、遠藤哲郎、野村晋太郎、白石賢二, 「電子ガスー量子ドット結合系における電子構造Ⅱ」, 日本物理学会2009年春季大会, 30pTX-1, 立教大学, 2009年3月28日. [URL]
  528. 三浦創史, 中澤日出樹, 西崎圭太, 末光眞希, 安井寛治, 伊藤隆, 遠藤哲郎, 成田克, 「Si 原料に有機シランを用いたプラズマCVD 法によるSi 添加DLC 膜の膜特性評価」, 日本物理学会2009年春季大会, 巻:56, 号:2, ページ:596, 立教大学, 2009年3月28日. [URL]
  529.    


    2008年(学術論文誌:5件;国際学会:12件;国内会議:13件。)



    学術論文誌


  530. Hideki Nakazawa, Yuhki Asai, Takeshi Kinoshita, Maki Suemitsu1, Toshimi Abe, Kanji Yasui, Takashi Itoh, Tetsuo Endoh, Yuzuru Narita, Atsushi Konno, Yoshiharu Enta, and Masao Mashita,” Thin-Film Deposition of Silicon-Incorporated Diamond-Like Carbon by Plasma-Enhanced Chemical Vapor Deposition Using Monomethylsilane as a Silicon Source.”, Japanese Journal of Applied Physics (JJAP), Vol. 47, No. 11, pp. 8491-8497, November 2008. [DOI: 10.1143/JJAP.47.8491]
  531. Shoun Matsunaga, Jun Hayakawa, Shoji Ikeda, Katsuya Miura, Haruhiro Hasegawa, Tetsuo Endoh, Hideo Ohno and Takahiro Hanyu,"Fabrication of a Nonvolatile Full Adder Based on Logic-in-Memory Architecture Using Magnetic Tunnel Junctions", Applied Physics Express (APEX), Vol. 1, pp. 091301 (3 pages), August 2008. [DOI: 10.1143/APEX.1.091301]
  532. Eiji Saito, Atsushi Konno, Takashi Ito, Kanji Yasui, Hideki Nakazawa, Tetsuo Endoh, Yuzuru Narita, Maki Suemitsu, ""Temperature oscillation" as a real-time monitoring of the growth of 3C-SiC on Si substrate", Applied Surface Science, Vol. 254, No. 19, pp. 6235-6237, July 2008. [DOI: 10.1016/j.apsusc.2008.02.190]
  533. Kazuyuki Tamura, Yuichiro Kuroki, Kanji Yasui, Maki Suemitsu, Takashi Ito, Tetsuro Endou, Hideki Nakazawa, Yuzuru Narita, Masasuke Takata, Tadashi Akahane, Growth of GaN on SiC/Si substrates using AlN buffer layer by hot-mesh CVD, Thin Solid Films, Volume 516, Issue 5, 15, Pages 659-662, January 2008. [DOI: 10.1016/j.tsf.2007.06.200]
  534. Yusuke Fukada, Kanji Yasui, Yuichiro Kuroki, Maki Suemitsu, Takashi Ito, Tetsuo Endoh, Hideki Nakazawa, Yuzuru Narita, Masasuke Takata, Tadashi Akahane,"Growth of GaN Films by Hot-Mesh Chemical Vapor Deposition Using Ruthenium Coated Tungsten Mesh",Japanese Journal of Applied Physics (JJAP), Vol. 47, No. 1, pp. 573-576, January 2008. [DOI: 10.1143/JJAP.47.573]


  535. 国際学会


  536. Masakazu Muraguchi, Yukihiro Takada, Yoko Sakurai, Tetsuo Endoh, Shintaro Nomura, Mitsuhisa Ikeda, Katsunori Makihara, Seiichi Miyazaki, and Kenji Shiraishi, "Theoretical investigation of quantum dot coupled to a two-dimensional electron system,"13th Advanced Heterostructures and Nanostructures Workshop (AHNW), Big Island of Hawaii, USA, December 7-13, 2008.
  537. Shintaro Nomura, Yoko Sakurai, Yukihiro Takada, Masakazu Muraguchi, Tetsuo Endoh, Mitsuhisa Ikeda, Katsunori Makihara, Seiichi Miyazaki, and Kenji Shiraishi, "Capacitance measurements on quantum dots coupled to a two-dimensional electron system," 13th Advanced Heterostructures and Nanostructures Workshop (AHNW), Big Island of Hawaii, USA, December 7-13, 2008.
  538. E. Nishimura, C. Kato, K. Yatsuda, T. Endoh, "New Fabrication Technology of 50nm Silicon Pillar with Roundness for Vertical MOSFETs," 21st International Microprocesses and Nanotechnology Conference, 29C-7-5,2008.
  539. Kousuke Tanaka and Tetsuo Endoh,”Study of Self-Heating Phenomena in Si Nano Wire MOS Transistor.”, The 1st Student Organizing International Mini-Conference on Information Electronics Systems, F4K-6, Sendai, Japan, October 16-17, 2008.
  540. Shoun Matsunaga, Jun Hayakawa, Shoji Ikeda, Katsuya Miura, Tetsuo Endoh, Hideo Ohno, and Takahiro Hanyu, "Fabrication of a Standby-Power-Free TMR-Based Nonvolatile Memory-in-Logic Circuit Chip with a Spin-Injection Write Scheme," International Conference on Solid State Devices and Materials (SSDM), C-3-6, pp. 274-275, Ibaraki, Japan, September 23-26, 2008.
  541. K. Suzuki, T. Endoh and T. Hanyu, "TMR-Logic-Based LUT for Quickly Wake-Up FPGA," 51st IEEE Midwest Symposium on Circuits and Systems (MWSCAS), pp. 326-329, Knoxville, TN, USA, August 10-13, 2008. [DOI: 10.1109/MWSCAS.2008.4616802]
  542. Yasuaki Komae, Takeshi Saitou, Maki Suemitsu, Takashi Ito, Tetsuro Endoh, Hideki Nakazawa, Yuzuru Narita, Kanji Yasui, Masasuke Takata, Tadashi Akahane, "The growth of GaN films by alternate source gas supply hot-mesh CVD method," 5th International Conference on Hot-wire CVD Process, Cambridge, MA, USA., August 20-24, 2008.
  543. Tetsuo Endoh, Kousuke Tanaka, Yuto Norifusa, "Study of Self-Heating Phenomena in Si Nano Wire MOS Transistor," 2008 Asia-Pacific Workshop on Fundamentals and Application of Advanced Semiconductor Devices (AWAD), 5A-1, pp. 101-105, Sapporo, Japan, July 9-11, 2008.
  544. Tetsuo Endoh and Masashi Kamiyanagi, "Novel Concept Dynamic Feedback MCML Technique for High-Speed and High-Gain MCML type D-Flip Flop," 2008 Asia-Pacific Workshop on Fundamentals and Application of Advanced Semiconductor Devices (AWAD), 7B-1, pp. 227-231, Sapporo, Japan, July 9-11, 2008.
  545. Masashi Kamiyanagi, Yuto Norifusa, Tetsuo Endoh, "Impact of 180nm Current Controlled MCML for realizing stable circuit operations under threshold voltage fluctuations," 2008 Asia-Pacific Workshop on Fundamentals and Application of Advanced Semiconductor Devices (AWAD), 7B-2, Sapporo, Japan, July 9-11, 2008.
  546. Yuto Norifusa and Tetsuo Endoh, "Scalability of Vertical MOSFETs in Sub-10nm generation and its Mechanism," 2008 Asia-Pacific Workshop on Fundamentals and Application of Advanced Semiconductor Devices (AWAD), 5A-2, Sapporo, Japan, July 9-11, 2008.
  547. Yuto Norifusa and Tetsuo Endoh, "High Performance Multi-Nano-Pillar Type Vertical MOSFET Scaling to 15nm Node," 2008 International Meeting for Future Electron Devices, Kansai (IMFEDK), A-3, Osaka, Japan, May 22-23, 2008.

    国内会議


  548. 小前泰彰, 齋藤健, 末光眞希, 伊藤隆, 遠藤哲郎, 中澤日出樹, 成田克, 高田雅介, 安井寛治, 赤羽正志,”パルスモードホットメッシュCVD法による窒化物半導体のエピタキシャル成長.”,電子情報通信学会技術研究報告.(CPM), 巻:108, 号:269, ページ:7-12, 2008年10月23日. [URL]
  549. 中澤日出樹,杉田寛臣,遠田義晴,末光眞希,安井寛治,伊藤 隆,遠藤哲郎,成田 克,真下正夫, 「レーザーアブレーション法によるSi添加DLC膜の原子状水素エッチング」, 第22回 ダイヤモンドシンポジウム, 206, 早稲田大学, 2008年10月21日-22日.
  550. 三浦創史,中澤日出樹,杉田寛臣,遠田義晴,末光眞希,安井寛治,伊藤隆,遠藤哲郎,成田克,真下正夫,”原子状水素によるSi添加DLC膜のエッチング.”, 応用物理学関係連合講演会, 巻:69, 号:2, ページ:498, 2008年9月2日.
  551. Tetsuo Endoh, Kousuke Tanaka, Yuto Norifusa ,” Mechanism of Self-Heating Phenomena in Si Nano Wire MOS Transistor.”, The 2008 Tohoku-section Joint Convention Record of Institutes of Electrical and Information Engineers Japan, Vol. 2008, pp. 37, Nihon University, August 21-22, 2008.
  552. Masashi Kamiyanagi and Tetsuo Endoh, “Control Theory of CC-MCML for Stable Operation under Fluctuation of the Threshold voltage.”, The 2008 Tohoku-section Joint Convention Record of Institutes of Electrical and Information Engineers Japan, Vol. 2008, pp. 36, Nihon University, August 21-22, 2008.
  553. Fumitaka Iga and Tetsuo Endoh,”Evaluation technique of SONOS type MOS diode for future nonvolatile memory.”, The 2008 Tohoku-section Joint Convention Record of Institutes of Electrical and Information Engineers Japan, Vol. 2008, pp. 34, Nihon University, August 21-22, 2008.
  554. Tetsuo Endoh, Kousuke Tanaka, Yuto Norifusa, "Study of Self-Heating Phenomena in Si Nano Wire MOS Transistor"IEICE Technical Report, Electron Device (ED), Vol. 108, No. 121, pp. 101-105, July 2, 2008. [URL]
  555. Tetsuo Endoh, Kousuke Tanaka, Yuto Norifusa, "Study of Self-Heating Phenomena in Si Nano Wire MOS Transistor", IEICE Technical Report, Silicon Device and Materials (SDM), Vol. 108, No. 122, pp. 101-105, July 2, 2008. [URL]
  556. Tetsuo Endoh and Yuto Norifusa, "Scalability of Vertical MOSFETs in Sub-10nm generation and its Mechanism", IEICE Technical Report, Electron Device (ED), Vol. 108, No. 121, pp. 107-111, July 2, 2008. [URL]
  557. Tetsuo Endoh and Yuto Norifusa, "Scalability of Vertical MOSFETs in Sub-10nm generation and its Mechanism", IEICE Technical Report, Silicon Device and Materials (SDM), Vol. 108, No. 122, pp. 107-111, July 2, 2008. [URL]
  558. 安井寛治, 末光眞希, 遠藤哲郎, 伊藤隆, 中澤日出樹, 成田克, 高田雅介, 赤羽正志,”メッシュ状金属キャタライザを用いたGaN結晶のエピタキシャル成長.”,第5回Cat-CVD研究会, S20-2-8, 神奈川工科大学, 2008年6月20日-21日.
  559. 小前泰彰, 齋藤健, 末光眞希, 遠藤哲郎, 伊藤隆, 中澤日出樹, 成田克, 高田雅介, 赤羽正志, 安井寛治,”Hot-mesh CVD法を用いた原料ガスパルス供給によるGaN成長.”,[第5回Cat-CVD研究会, S20-2-11, 神奈川工科大学, 2008年6月20日-21日.
  560. 安井寛治, 深田祐介, 安部和貴, 黒木雄一郎, 末光眞希, 伊藤 隆, 成田 克, 遠藤哲郎, 中澤日出樹, 高田雅介,赤羽正志, “触媒反応CVD (Cat-CVD) 法によるGaN結晶膜の省資源成長技術.”,電子情報通信学会2008年総合大会講演論文集--エレクトロニクス, C-6-8, pp. 26-27, 北九州市立大学, 2008年3月5日. [URL]
  561.    


    2007年(学術論文誌:3件;国際学会:4件;国内会議:6件。)



    学術論文誌


  562. Tetsuo Endoh and Yuto Monma, "Study of 30-nm Double-Gate MOSFET with Halo Implantation Technology using a Two-Dimensional Device Simulator", IEICE Transactions on Electronics, Vol.E90-C, No. 5, pp. 1000-1005, May 2007. [DOI: 10.1093/ietele/e90-c.5.1000]
  563. Tetsuo Endoh, K. Hirose, and K. Shiroisi, "Physical Origin of Stress-Induced Leakage Currents in Ultra-Thin Silicon Dioxide Films", IEICE Transactions on Electronics, Vol. E90-C, No. 5, pp. 955-961, May 2007. [DOI: 10.1093/ietele/e90-c.5.955]
  564. Tetsuo Endoh and Kousuke Tanaka, "Study of Self-Heating in Si Nano Structure for Floating Body-Surround Gate Transistor with High-k Dielectric Films", Japanese Journal of Applied Physics (JJAP), Vol. 46, No. 5B, pp. 3189-3192, May 2007. [DOI: 10.1143/JJAP.46.3189]


  565. 国際学会


  566. S. Shukuri, N. Ajika, M. Mihara, Y. Kawajiri, T. Ogura, K. Kobayashi, T. Endoh and M. Nakashima, "Floating Gate B4-Flash Memory Technology Utilizing Novel Programming Scheme - Highly Scalable, Efficient and Temperature Independent Programming", IEEE Non-Volatile Semiconductor Memory Workshop, pp. 30-31, Monterey, California, USA, August 26?30, 2007. [DOI: 10.1109/NVSMW.2007.4290568]
  567. Y. Fukada, Y. Kuroki, K. Yasui, M. Suemitsu, T. Ito, T. Endoh, H. Nakazawa, Y. Narita, M. Takata and T. Akahane, "Decomposition characteristics of NH3 by ruthenium coated tungsten hot-mesh for the growth of nitride semiconductor films", 2007 International Symposium on Organic and Inorganic Electronic Materials and Related Nanotechnologies (EM-NANO), 2-36, Nagoya, Japan, June 19-22, 2007.
  568. Yuto Norifusa and Tetsuo Endoh, "Analysis of the Dependency of Body Thickness on the Performance of the Nano-Scale Vertical MOSFET", IEEE International Meeting for Future of Electron Devices, Kansai (IMFEDK), pp. A-3, Osaka, Japan, April 23-25, 2007.
  569. Kazuhiro Suzuki, Hyoung-jun Na, Yuzuru Narita, Hideki, Nakazawa, Takashi Itoh, Kanji Yasui, Maki Suemitsu and Tetsuo Endoh, "Effects of Threshold Voltage Fluctuations on Stability of MOS Current Mode Logic Inverter Circuit", IEEE International Meeting for Future of Electron Devices, Kansai (IMFEDK), pp. B-7, Osaka, Japan, April 23-25, 2007.

    国内会議


  570. 深田祐介, 安部和貴, 黒木雄一郎, 末光眞希, 伊藤 隆, 成田 克, 遠藤哲郎,中澤日出樹, 高田雅介, 安井寛治, 赤羽正志, 「ホットメッシュCVD法によるGaN成長-ルテニウムタングステンメッシュの効果」, 電子情報通信学会技術研究報告 電子部品・材料研究会(CPM)、 巻: 107, 号: 325, ページ: 55-58, 2007年11月9日. [URL]
  571. 深田祐介, 小前泰彰, 黒木雄一郎, 末光眞希, 伊藤隆, 成田克, 遠藤哲郎, 中澤日出樹, 高田雅介, 安井寛治, 赤羽正志, 「Ru コートWを用いた Hot-mesh CVD法によるGaN膜成長」, 電子情報通信学会2007ソサイエティ大会--エレクトロニクス, C-6-9, ページ: 17, 鳥取大学, 2007年9月13日. [URL]
  572. 鈴木一光、遠藤哲郎, 「The exclusive OR using MOS Current Mode Logic Circuit」, 平成19年度 電気関連学会東北支部連合大会, S-1A15, ページ: 15, 弘前大学, 2007年8月23日-24日.
  573. 則房勇人、遠藤哲郎, 「Device Design Technology for 30nm FINFETs with Halo Structure」, 平成19年度 電気関連学会東北支部連合大会, S-1A14, ページ: 14, 弘前大学, 2007年8月23日-24日.
  574. 田中幸介、遠藤哲郎, 「Mechnism of Asymmetric Temperature Distribution of Si Nano Wire with Self-Heating」, 平成19年度 電気関連学会東北支部連合大会, S-1A13, ページ: 13, 弘前大学, 2007年8月23日-24日.
  575. 深田祐介, 小前泰彰, 黒木雄一郎, 末光眞希, 伊藤 隆, 成田克, 遠藤哲郎, 中澤日出樹, 高田雅介, 安井寛治, 赤羽正志, 「ルテニウム担持したタングステンHot-mesh CVD法によるGaN成長」, 第4回Cat-CVD研究会, S-2-2, ページ: 53-56, 九州工業大学, 2007年6月29日-30日.
  576.    


    2006年(学術論文誌:2件;国際学会:7件;国内会議:8件。)



    学術論文誌


  577. Atsushi Konno, Yuzuru Narita, Takashi Ito, Kanji Yasui, Hideki Nakazawa, Tetsuo Endoh, and Maki Suemitsu, "Low-temperature Heteroepitaxial Growth of 3C-SiC(111)", The Electrochemical Society (ECS) Transations, Vol. 3, No. 5, pp. 449-455, October 2007. [DOI: 10.1149/1.2357236]
  578. Yuzuru Narita, Takeshi Murata, Atsushi Kato, Tetsuo Endoh, and Maki Suemitsu, "Ge Dot formation using Germane on a Monomethylsilane-Adsorbed Si(001)-2x1 Surface", Thin Solid Films, Vol. 508, Issues 1-2, pp. 200-202, June 2006. [DOI: 10.1016/j.tsf.2005.08.400]


  579. 国際学会


  580. Yuto Momma and Tetsuo Endoh, "Study of Effect of Halo Implantation on Nano-Scale Double Gate MOSFET", 2nd International Symposium on Bio- and Nano-Electronics, P-37, pp. 119-120, Sendai, Japan, December 9 - 10, 2006.
  581. Hyoungjun Na, Maki Suemitsu, and Tetsuo Endoh, "Study of Stability on MCML (MOS Current Mode Logic) Inverter Circuit to Threshold Voltage Fluctuations Caused in Future Nanoscale Si-MOS Process Generation", 2nd International Symposium on Bio- and Nano-Electronics, P-39, pp. 123-124, Sendai, Japan, December 9 - 10, 2006.
  582. Tetsuo Endoh and Kousuke Tanaka, "Study of Self-Heating in Si Nano Structure for FB-SGT with High-k Dielectric Films", 2006 International Workshop on Dielectric Thin Films for Future ULSI Devices (IWDTF), pp. 115-116, Kawasaki Japan, November 8-10, 2006.
  583. Yuto Monma and Tetsuo Endoh, "Study of 30-nm Double-Gate MOSFET with Halo Implantation Technology", 2006 Asia-Pacific Workshop on Fundamental and Application of Advanced Semiconductor Devices (AWAD), 8A-4, pp. 229-232, Sendai, Japan, July 3-5, 2006.
  584. T. Endoh, K. Hirose, and K. Shiraisi, "Physical Origin of Stress-Induced Leakage Currents in Ultra-Thin Silicon Dioxide Films", 2006 Asia-Pacific Workshop on Fundamental and Application of Advanced Semiconductor Devices (AWAD), 9A-3, pp. 271-276, Sendai, Japan, July 3-5, 2006.
  585. Hyoungjun Na, Maki Suemitsu, and Tetsuo Endoh, "The Guideline of Tolerable Vth Fluctuation for MCML (MOS Current Mode Logic) Inverter Circuit", 2006 Asia-Pacific Workshop on Fundamental and Application of Advanced Semiconductor Devices (AWAD), 8A-5, pp. 233-236, Sendai, Japan, July 3-5, 2006.
  586. S. Shukuri, N. Ajika, M. Mihara, K. Kobayashi, T. Endoh, and M. Nakashima, "A 60nm NOR Flash Memory Cell Technology Utilizing Back Bias Assisted Band-to-Band Tunneling Induced Hot-Electron Injection (B4-Flash)", 2006 Symposium on VLSI Technology , pp. 15-16, Honolulu, USA, June 13-15, 2006. [DOI: 10.1109/VLSIT.2006.1705194]


  587. 国内会議


  588. 遠藤哲郎, 「トランジスタ構造の立体化:縦型MOSトランジスタの高密度メモリへの可能性」, 応用物理学会巻:75, 号:9, ページ:1115-1119, 2006年9月10日. [URL]
  589. 田中幸介、遠藤哲郎, 「Study of Self-Heating in NANO Wire」, 平成18年度 電気関連学会東北支部連合大会, 2A04, ページ:22, 秋田大学, 2006年8月31日-9月1日.
  590. 鈴木一光、羅炯竣、遠藤哲郎, 「Effect of Supply Voltage Fluctuations on Stability of Inverter Ciruit of MOS Current Mode Logic」, 平成18年度 電気関連学会東北支部連合大会, 2A05, ページ:23, 秋田大学, 2006年8月31日-9月1日.
  591. 遠藤哲郎, 「次世代シリコン集積回路に求められる新構造デバイス技術」, 21世紀COE「原子論的生産技術の創出拠点」ワークショップ--次世代半導体デバイス開発における計算科学の現状と将来, 大阪大学, 2006年5月17日.
  592. 門間優太、遠藤哲郎, 「100nmゲート長30nmボディSiのダブルゲートMOSFETにおけるhaloI/Iの効果に関する検討」,2006年春季第53回応用物理学関係連合講演会, 25p-X-16, 武蔵工業大学, 2006年3月22日-26日.
  593. 羅炯竣, 田中幸介, 門間優太, 末光眞希, 遠藤哲郎, 「MCMLインバーター回路の安定性に対するしきい値ばらつきの影響に関する検討」,2006年春季第53回応用物理学関係連合講演会, 23a-X-5, 武蔵工業大学, 2006年3月22日-26日.
  594. 遠藤哲郎,大塚文雄、奈良安雄、安平光雄、有門経敏, 「次世代シリコン集積回路に求められる新構造デバイス技術」, 2006年春季第53回応用物理学関係連合講演会, ZF-2, ページ:24, 武蔵工業大学, 2006年3月22日-26日.
  595. 遠藤哲郎, 「自分の頭脳で次世代LSIの創生を目指せ!」, 日本半導体製造装置協会(SEAJ), 巻:104, ページ:28-30, 2006.
  596.    


    2005年(学術論文誌:0件;国際学会:0件;国内会議:3件。)



    国内会議


  597. Yuto Momma and Tetsuo Endoh, 「Study of Effect of Halo Implantation on 30nm Ultra Thin Body Si Double-Gate MOSFET with 100nm Gate Length」, 平成17年度 電気関連学会東北支部連合大会, 2A17, ページ:30, 岩手大学, 2005年8月25日-26日.
  598. H. Na, K. Tanaka, Y. Momma, M. Suemitsu, and T. Endoh, 「Effect of Threshold Voltage Fluctuations on Stability of Inverter Circuit of MOS Current Mode Logic」, 平成17年度 電気関連学会東北支部連合大会, 2A18, ページ:31, 岩手大学, 2005年8月25日-26日.
  599. 山田啓作、知京豊裕、遠藤哲郎、岩井洋, 「10nmCMOSに向けた40nmデザインルールによる学独連携相乗りマスク製作」, シンポジウム 「来るべきナノCMOS時代に向けての挑戦とその課題」(IEEE、EDS,電気学会、電子情報通信学会、JST,応用物理学会共催), 早稲田大学, 2005年4月27日-28日.
  600.    


    2004年以前の関連論文(学術論文誌:46件;国際学会:42件;国内会議:56件。)



    学術論文誌


  601. Yuzuru Narita, Masashi SAKAI, Takeshi Murata, Tetsuo Endoh, and Maki Suemitsu, "Ge-Dot Formation on Si(111)-7X7 Surface with C Predeposition Using Monomethylsilane", JapaneseJournal of Applied Physics (JJAP), Vol. 44, No.3, pp. L123-L125, December 2004. [DOI: 10.1143/JJAP.44.L123]
  602. Makoto Iwai, Yasue Yamamoto, Ryohsuke Nishi, Hiroshi Sakuraba, Tetsuo Endoh, and Fujio Masuoka, "High-performance buried-gate surrounding gate transistor for future three-dimensional devices," Japanese Journal of Applied Physics (JJAP), Vol. 43, No. 10, pp. 6904-6906, October 2004. [DOI: 10.1143/JJAP.43.6904]
  603. Masakazu Hioki, Hiroshi Sakuraba, Tetsuo Endoh, and Fujio Masuoka, "An analysis of program and erase mechanisms for Floating Channel Type Surrounding Gate Transistor Flash memory cells," IEICE Transactions on Electronics, Vol. E87C, No.9, pp. 1628-1635, September 2004. [URL]
  604. Hiroki Nakamura, Tetsuo Endoh, Hiroshi Sakuraba, and Fujio Masuoka, "Novel NAND DRAM with surrounding gate transistor (SGT)-type gain cell," Electronics and Communications in Japan Part III-Electronics, Vol. 87, No. 7, pp. 1-8, June 2004. [DOI: 10.1002/ecjb.10198]
  605. Hiroshi Sakuraba, Kazushi Kinoshita, Takuji Tanigami, Takashi Yokoyama, Shinji Horii, Masahiro Saitoh, Keizou Sakiyama, Tetsuo Endoh, and Fujio Masuoka, "New Three-Dimensional High-Density Stacked-Surrounding Gate Transistor (S-SGT) flash memory architecture using self-aligned interconnection fabrication technology without photolithography process for tera-bits and beyond," Japanese Journal of Applied Physics (JJAP), Vol. 43, No. 4B, pp. 2217-2219, April 2004. [DOI: 10.1143/JJAP.43.2217]
  606. 中村広記, 遠藤哲郎, 桜庭弘, 舛岡富士雄, "Surrounding Gate Transistor (SGT)型ゲインセルを用いた新しいNAND DRAM," 電子情報通信学会論文誌C, Vol. J86-C, No. 8, pp. 944-951, August 2003. [URL]
  607. Tetsuo Endoh, Kazushi Kinoshita, Takuji Tanigami, Yoshihisa Wada, Kota Sato, Kazuya Yamada, Takashi Yokoyama, Noboru Takeuchi, Kenichi Tanaka, Nobuyoshi Awaya, Keizou Sakiyama, and Fujio Masuoka, "Novel Ultrahigh-Density Flash Memory With a Stacked-Surrounding Gate Transistor (S-SGT) Structured Cell," IEEE Transactions on Electron Devices, Vol. 50 , No.4, pp. 945-951, April 2003. [DOI: 10.1109/TED.2003.809429]
  608. 西亮輔, 鈴木正彦, 桜庭弘, 遠藤哲郎, 舛岡富士雄, 「SGTの基板バイアス効果を抑制させる拡散層形状に関する解析」, 電子情報通信学会論文誌C, Vol. J84-C, No. 10, pp. 1018-1019, October 2001. [URL]
  609. Tetsuo Endoh, Yasutaka Kimura, Markus Lenski, and Fujio Masuoka, "Influence of Silicon Wafer Loading Ambient on Chemical Composition and Thickness Uniformity of Sub-5-nm-Thick Oxide Films", Japanese Journal of Applied Physics (JJAP), Vol. 40, No. 12, pp. 7023-7028, August 2001. [DOI: 10.1143/JJAP.40.7023]
  610. Tetsuo Endoh, Masahiko Suzuki, Hiroshi Sakuraba and Fujio Masuoka, "2.4F2 Memory Cell Technology with Stacked- Surrounding Gate Transistor (S-SGT) DRAM", IEEE Transactions on Electron Devices, Vol. 48, No.8, pp. 1599-1603, August 2001. [DOI: 10.1109/16.936567]
  611. Tetsuo Endoh, Kazuhisa Sunaga, Hiroshi Sakuraba, and Fujio Masuoka, "An On-Chip 96.5% Current Efficiency CMOS Linear Regulator Using a Flexible Control Technique of Output Current", IEEE Journal of Solid-State Circuits (JSSC), Vol. 36, No. 1, pp. 34-39, August 2001. [DOI: 10.1109/4.896226]
  612. Akira Tanabe, Masato Umetani, Ikuo Fujiwara, Takayuki Ogura, Kotaro Kataoka, Masao Okihara, Hiroshi Sakuraba, Tetsuo Endoh, and Fujio Masuoka, "0.18μm CMOS 10-Gb/s Multiplexer/Demultiplexer ICs Using Current Mode Logic with Tolerance to Threshold Voltage Fluctuation", IEEE Journal of Solid-State Circuits (JSSC), Vol. 36, No. 6, pp. 988-996, June 2001. [DOI: 10.1109/4.924861]
  613. 遠藤哲郎, 船木寿彦, 中村広記, 桜庭弘, 舛岡富士雄, 「新しい基板コンタクト型パストランジスタ」, 電子情報通信学会論文誌 C ,Vol. J84-C, No. 3, pp. 192-198, March 2001. [URL]
  614. 遠藤哲郎, 中村広記, 船木寿彦, 桜庭弘, 舛岡富士雄, 「新しい基板コンタクト型パストランジスタを用いた全加算器」, 電子情報通信学会論文誌 C, Vol. J84-C, No. 2, pp. 158-159, February 2001. [URL]
  615. Markus Lenski, Tetsuo Endoh, and Fujio Masuoka, "Analytical modeling of stress-induced leakage currents in 5.1-9.6-nm-thick silicon-dioxide films based on two-step inelastic trap-assisted tunneling," Journal of Applied Physics (JAP), vol. 88, Issue 9, pp. 5238-5245, November 2000. [DOI: 10.1063/1.1312842]
  616. 鈴木正彦, 遠藤哲郎, 桜庭弘, 舛岡富士雄, "Stacked-SGT DRAMを用いた2.4F2メモリセル技術," 電子情報通信学会論文誌C, vol. J83-C, No. 1, pp. 92-93, January 2000. [URL]
  617. 小倉孝之、遠藤哲郎、桜庭弘、舛岡富士雄, 「Double Side Quasi-SOI MOSFET」, 電子情報通信学会C-I, vol. J82-C-1, No. 8, pp. 498-499, August 1999. [URL]
  618. 小倉孝之、遠藤哲郎、桜庭弘、舛岡富士雄, 「Double Side Quasi-SOI MOSFET」, 電子情報通信学会C-I, vol. J82-C-2, No. 8, pp. 464-465, August 1999. [URL]
  619. Tetsuo Endoh, Takao Chiba, Hiroshi Sakuraba, Markus Lenski, and FujioMasuoka, "A quantitative analysis of stress-induced leakage currents and extracyion of trap properties in 6.8nm ultrathin silicon dioxide films," JOURNAL OF APPLIED PHYSICS, vol. 86, No. 4, pp. 2095-2099, June 1999. [DOI: 10.1063/1.371015]
  620. Tetsuo Endoh, Katsuhisa Shinmei, Hiroshi Sakuraba, and Fujio Masuoka, "New Three-Dimensional Memory Array Architecture for Future Ultrahigh-Density DRAM," IEEE JOURNAL OF SOLID-STATE CIRCUITS, vol. 34, No. 4, pp. 476-483, April 1999. [DOI: 10.1109/4.753680]
  621. 遠藤哲郎、日置雅和、桜庭 弘、舛岡富士雄, 「Floating Channel type SGT Flashメモリ」, 電子情報通信学会論文誌C-I, vol. J82-C-1, No. 3, pp. 134-135, March 1999. [URL]
  622. 遠藤哲郎、日置雅和、桜庭 弘、舛岡富士雄, 「Floating Channel type SGT Flashメモリ」, 電子情報通信学会論文誌C-II, vol. J82-C-2, No. 3, pp. 126-127, March 1999. [URL]
  623. 遠藤哲郎、森 雅朋、桜庭 弘、舛岡富士雄, 「完全空乏型Double-Gate SOI MOSFETの短チャネル効果の解析」, 電子情報通信学会論文誌C-I, vol. J82-C-1, No. 2, pp. 94-95, February 1999. [URL]
  624. 遠藤哲郎、森 雅朋、桜庭 弘、舛岡富士雄, 「完全空乏型Double-Gate SOI MOSFETの短チャネル効果の解析」, 電子情報通信学会論文誌C-II, vol. J82-C-2, No. 2, pp. 72-73, February 1999. [URL]
  625. Tetsuo Endoh, Kazutoshi Nakamura, and FujioMasuoka, "A High Performance Voltage Down Converter (VDC) Using New Flexible Control Technology of Driving Current," IEICE Transactions on Electronics, Vol. E81-C, No. 12, pp. 1905-1912, December 1998. [URL]
  626. Tetsuo Endoh, Katsuhisa Shinmei, Hiroshi Sakuraba, and Fujio Masuoka, "The Analysis of the Stacked-Surrounding Gate Transistor (S-SGT) DRAM for the High Speed and Low Voltage Operation," IEICE Transactions on Electronics, Vol. E81-C, No. 9, pp. 1491-1498, September 1998. [URL]
  627. Tetsuo Endoh, Kazutoshi Nakamura, and Fujio Masuoka, "Evaluation of the Voltage Down Converter (VDC) with Low Ratio of Consuming Current to Load Current in DC/AC Operation Mode," IEICE Transactions on Electronics, vol. E81-C, No. 6, pp. 968-974, June 1998. [URL]
  628. 遠藤哲郎, 神明克尚, 舛岡富士雄, "3次元階層型メモリアレー技術を用いたStacked-SGT DRAM," 電子情報通信学会論文誌 C-I, Vol. J81-C-1, No. 5, pp. 288-289, May 1998. [URL]
  629. 遠藤哲郎, 神明克尚, 舛岡富士雄, "3次元階層型メモリアレー技術を用いたStacked-SGT DRAM," 電子情報通信学会論文誌 C-I, Vol. J81-C-2, No. 5, pp. 488-489, May 1998. [URL]
  630. Tetsuo Endoh, Kazuyoshi Shimizu, Hirohisa Iizuka, and Fujio Masuoka, "A New Write/Erase Method to Improve The Read Disturb Characteristics Based on The Decay Phenomena of Stress Leakage Current for Flash Memories," IEEE Transactions on Electron Devices, Vol. 45, Issue 1, pp. 98-104, January 1998. [DOI: 10.1109/16.658817]
  631. Tetsuo Endoh, Kazuyoshi Shimizu, Hirohisa Iizuka, and Fujio Masuoka, "New Reduction Mechanism of The Stress Leakage Current Based on The Deactivation of Step Tunneling Sites for Thin oxide films," IEICE Transactions on Electronics, vol. E80-C, No. 10, pp. 1310-1316, October 1997. [URL]
  632. Tetsuo Endoh, Hirohisa Iizuka, Riichiro Shirota, and Fujio Masuoka, "New Write/Erase Operation Technology for Flash EEPROM Cells to Improve the Read Disturb Characteristics," IEICE Transactions on Electronics, vol. E80-C, No. 10, pp. 1317-1323, October 1997. [URL]
  633. 遠藤哲郎, 冨永謙一郎, 舛岡富士雄, "Multi-SGTの高速動作に関する解析," 電子情報通信学会論文誌 C-II, vol. J80-C-II, No. 8, pp. 284-285, August 1997. [URL]
  634. Tetsuo Endoh, Tairiku NAKAMURA, and Fujio Masuoka, "An Accurate Model of Fully-Depleted Surrounding Gate-Transistor (FD-SGT)," IEICE Transactions on Electronics, vol. E80-C, No. 7, pp. 905-910, July 1997. [URL]
  635. Tetsuo Endoh, Tairiku NAKAMURA, and Fujio Masuoka, "The Analytic Steady-State Current-Voltage Characteristics of Short Channel Fully-Depleted Surrounding Gate Transistor (FD-SGT)," IEICE Transactions on Electronics, vol. E80-C, No. 7, pp. 911-917, July 1997. [URL]
  636. 遠藤哲郎、中村和敏、舛岡富士雄, "大負荷電流を駆動できる新しい低消費電力降圧回路," 電子情報通信学会和分論文誌 C-I, vol. J80-C-I, No. 3, pp. 134-135, March 1997. [URL]
  637. 遠藤哲郎、中村和敏、舛岡富士雄, "大負荷電流を駆動できる新しい低消費電力降圧回路," 電子情報通信学会和分論文誌 C-II, vol. J80-C-II, No. 3, pp. 117-118, March 1997. [URL]
  638. 遠藤 哲郎、舛岡 富士雄, "フラッシュEEPROMのデータ書き換え特性," 電子情報通信学会論文誌 C-I, vol. J79-C-1, No. 7, pp. 203-209, July 1996. [URL]
  639. 遠藤 哲郎、舛岡 富士雄, "フラッシュEEPROMのデータ書き換え特性," 電子情報通信学会論文誌 C-II, vol. J79-C-2, No. 7, pp. 333-339, July 1996. [URL]
  640. Hirohisa Iizuka, Tetsuo Endoh, Seiichi Aritome, Riichiro Shirota, and Fujio Masuoka, "A Novel Programming Method Using a Reverse Polarity Pulse in Flash EEPROMs," IEICE TRANSACTIONS on Electronics, vol. E79-C, No. 6, pp. 832-835, June 1996. [URL]
  641. Gertjan Hemink, Tetsuo Endoh, and Riichiro Shirota, "Modeling of the Hole Current Caused by Flowler-Nordheim Tunneling through Thin Oxides," Japanese Journal of Applied Physics (JJAP), vol. 33, pp. 546-549, January 1994. [DOI: 10.1143/JJAP.33.546]
  642. Seiichi Aritome, Ikuo Hatakeyama, Tetsuo Endoh, Tetsuya Yamaguchi, Susumu Shuto, Hirohisa Iizuka, Tooru Maruyama, Hiroshi WATANABE, Gertjan Hemink, Koji Sakui, Tomoharu Tanaka, Masaki Momodomi, and Riichiro Shirota, "An Advanced NAND-Structure Cell Technology for Reliable 3.3V 64Mb Electrically Erasable and Programmable Read Only Memories(EEPROMs)," Japanese Journal of Applied Physics (JJAP), vol. 33, pp. 524-528, January 1994. [DOI: 10.1143/JJAP.33.524]
  643. Tetsuo Endoh, Riichiro Shirota, Seiichi Aritome, and Fujio Masuoka,“A Study of High-Performance NAND Structured EEPROMS.”, IEICE Transactions on Electronics, Vol. E75-C, No.11, pp.1351-1357, November 1992. [URL]
  644. Yoshihisa Iwata, Masaki Momodomi, Tomoharu Tanaka, Hideko Oodaira, Yasuo Itoh, Ryouzo Nakayama, Ryouhei Kirisawa, Seiichi Aritome, Tetsuo Endoh, Riichiro Shirota, Kazunori Ohuchi, AND Fujio Masuoka, "High-Density NAND EEPROM with Block-Page Programming for Microcomputer Applications," IEEE Journal of Solid-State Circuits (JSSC), vol.25, Issue 2, pp.417-424, April 1990. [DOI: 10.1109/4.52165]
  645. Tetsuo Endoh, Riichiroh Shirota, Masaki Momodomi, AND Fujio Masuoka, "An Accurate Model of Subbreakdown Due to Band-to-Band Tunneling and Some Applications," IEEE Transactions on Electron Devices, vol.37, Issue 1, pp.290-296, January 1990. [DOI: 10.1109/16.43828]
  646. Masaki Momodomi, Yasuo Itoh, Riichiro Shirota, Yoshihisa Iwata, Ryouzo Nakayama, Ryouhei Kirisawa, Tomoharu Tanaka, Seiichi Aritome, Tetsuo Endoh, Kazunori Ohuchi, and Fujio Masuoka, "An Experimental 4-Mbit CMOS EEPROM with a NAND-Structured Cell," IEEE Journal of Solid-State Circuits (JSSC), vol.24, Issue 5, pp.1238-1243, October 1989. [DOI: 10.1109/JSSC.1989.572587]

  647. 国際学会


  648. S. Shukuri, M. Iwai, H. Ohta, M. Suzuki, H. Sakuraba, T. Endoh, and F. Masuoka, "Pillar Diameter Dependence of the Carrier Response Time in a Surrounding Gate type MOS Capacitor.[The Electrochemical Society (204th),Abs#144,(2003)]M. Iwai, H. Ohta, M. Suzuki, H. Sakuraba, T. Endoh, and F. Masuoka," The Electrochemical Society (204th), Abstract#144, Orlando, Florida, USA, October 12-16, 2003. [URL]
  649. S. Shukuri, M. Iwai, Y. Yamamoto, R. Nishi, H. Sakuraba, T. Endoh, and F. Masuoka, "High Performance Buried Gate Transistor (BG-SGT) for Future Three-Dimensional Devices,"The 2003 International Conference on Solid State Devices and Materials (SSDM), pp. 630-631, Tokyo, Japan, September 16-19, 2003.
  650. S. Shukuri, H. Sakuraba, K. Kinoshita, T. Tanigami, T. Yokoyama, S. Horii, M. Saitoh, K. Sakiyama, T. Endoh, and F. Masuoka, "New Three Dimensional High Density S-SGT Flash Memory Architecture using Self-Aligned Interconnection Fabricating Technology without Photo Lithography Process for Tera Bits and Beyond," The 2003 International Conference on Solid State Devices and Materials (SSDM), pp. 642-643, Tokyo, Japan, September 16-19, 2003.
  651. S. Shukuri, W. Sakamoto, T. Endoh, H. Sakuraba, and F. Masuoka, "Reduction of Pass-Gate Leakage by Silicon Thickness Thinning in Double-Gate MOSFETs," 11th International symposium on Silicon-on-insulator technology and devices (Electrochemical Society Proceedings), Vol. 5, pp. 331-336, Paris, France, April 2003. [URL]
  652. T. Endoh, K. Kinoshita, T. Tanigami, Y. Wada, K. Sato, K. Yamada, T. Yokoyama, N. Takeuchi, K. Tanaka, N. Awaya, K. Sakiyama, and F. Masuoka, "New Stacked-Surrounding Gate Transistor (S-SGT) Structured Cell For Future Ultra High Density Flash Memory," ECS Satellite Conferences: 2002 International Semiconductor Technology Conference (ISTC), Abstract#39, Tokyo, Japan, September 11-14, 2002.
  653. F. Masuoka, T. Endoh, and H. Sakuraba, "New three dimensional (3D) memory array architecture for future ultra high density DRAM ," 2002 IEEE International Caracas Conference on Devices, Circuits and Systems, pp. C015 (6pages), Dutch Caribbean, Netherlands, April 17-19, 2002. [DOI: 10.1109/ICCDCS.2002.1004003]
  654. T. Endoh, K. Kinoshita, T. Tanigami, Y. Wada, K. Sato, K. Yamada, T. Yokoyama, N. Takeuchi, K. Tanaka, N. Awaya, K. Sakiyama, and F. Masuoka, "Novel Ultra High Density Flash Memory with A Stacked-Surrounding Gate Transistor (S-SGT) Structured Cell", IEEE 2001 International Electron Devices Meeting (IEDM), pp. 2.3.1-2.3.4, Washington DC, USA, December 2-5, 2001. [DOI: 10.1109/IEDM.2001.979396]
  655. Tetsuo Endoh, "A quantitative analysis of stress-induced leakage currents in ultra-thin silicon dioxide films", the 6th International Conference on Solid-State and Integrated-Circuit Technology, pp. 958-963, Shanghai, China, October 22-25, 2001. [DOI: 10.1109/ICSICT.2001.982054]
  656. M. Lenski, Y. Kimura, M. Iwai, H. Sakuraba T. Endoh, and F. Masuoka, "Influence of Silicon Wafer Loading Conditions on Thickness Uniformity of Sub-5nm-Thick Oxide Films", 2001 Asia-Pacific Workshop on Fundamental and Application of Advanced Semiconductor Devices (AWAD), pp. 25-28, Cheju-Do, Korea, July 4 - 7, 2001.
  657. R. Nishi, M. Suzuki, H. Sakuraba, T. Endoh and F. Masuoka, "Novel S/D Engineering of Surrounding Gate Transistor (SGT) for Suppressing Substrate Bias Effect", 2001 Asia-Pacific Workshop on Fundamental and Application of Advanced Semiconductor Devices (AWAD), pp. 263-266, Cheju-Do, Korea, July 4 - 7, 2001.
  658. M. Iwai, H. Ohta, M. Suzuki, H. Sakuraba, T. Endoh, and F. Masuoka, "Multi-Pillar Surrounding Gate Transistor (M-SGT) type MOS Capacitor Using 0.4μm MOS Technology", 2001 Asia-Pacific Workshop on Fundamental and Application of Advanced Semiconductor Devices (AWAD), pp. 257-261, Cheju-Do, Korea, July 4 - 7, 2001.
  659. F. Masuoka and T. Endoh, "Technology Trend of Flash Memory", the ECS 1st International Conference on Semiconductor Technology (ISTC), pp. 1-10, Shanghai, China, May 27-30, 2001.
  660. T. Endoh, Y. Kimura, M. Lenski, H. Sakuraba and F. Masuoka, "Influence of Wafer Loading Atmosphere upon Chemical Structure of Sub-5nm Oxide Films", the ECS 1st International Conference on Semiconductor Technology (ISTC), pp. 196-200, Shanghai, China, May 27-30, 2001.
  661. T. Endoh, H. Nakamura, H. Sakuraba and F. Masuoka, "Cell Array Design of Stacked-Surrounding Gate Transistor (S-SGT) DRAM for Small Array Noise and Ultra-High Density DRAM", the ECS 1st International Conference on Semiconductor Technology (ISTC), pp. 23-31, Shanghai, China, May 27-30, 2001.
  662. K. Sunaga, T. Endoh, H. Sakuraba, and F. Masuoka, "An On-Chip 96.5% Current Efficiency CMOS Linear Regulator", 2001 Asia and South Pacific Design Automation Conference (ASP-DAC), pp. 297-301, Yokohama, Japan, January 2001. [DOI: 10.1109/ASPDAC.2001.913322]
  663. M. Hioki, T. Endoh, H. Sakuraba, M. Lenski, and F. Masuoka, "An Analysis of Program and Erase Operation for FC-SGT Flash Memory Cells," 2000 International Conference on Simulation of Semiconductor Processes and Devices (SISPAD), pp. 116-118, Seattle, WA, USA, September 6-8, 2000. [DOI: 10.1109/SISPAD.2000.871221]
  664. T. Endoh, T. Funaki, H. Sakuraba, and F. Masuoka, "A High Signal Swing Pass-Transistor Logic Using Surrounding Gate Transistor," 2000 International Conference on Simulation of Semiconductor Processes and Devices (SISPAD), pp. 273-275, Seattle, WA, USA, September 6-8, 2000. [DOI: 10.1109/SISPAD.2000.871261]
  665. I. Fujiwara, H. Sakuraba, M. Umetani, T. Ogura, K. Kataoka, A. Tanabe, T. Endoh, and F. Masuoka, "0.2μm nMOSFET using EB Exposure for All Lithography Processes," 22nd International Conference on Microelectronics, Vol. 2, pp. 439-442, Nis Yugoslavia, May 14-17, 2000. [DOI: 10.1109/ICMEL.2000.838727]
  666. T. Endoh, H. Sakuraba, K. Shinmei, and F. Masuoka, "New Three Dimensional (3D) Memory Array Architecture For Future Ultra High Density DRAM," 22nd International Conference on Microelectronics, Vol. 2, pp. 447-450, Nis Yugoslavia, May 14-17, 2000. [DOI: 10.1109/ICMEL.2000.838729]
  667. T. Endoh, H. Sakuraba, K. Shinmei, and F. Masuoka, "The 1.44F2 Memory Cell Technology with the Stacked-Surrounding Gate Transistor (S-SGT) DRAM," 22nd International Conference on Microelectronics, Vol. 2, pp. 451-454, Nis Yugoslavia, May 14-17, 2000. [DOI: 10.1109/ICMEL.2000.838730]
  668. M. Suzuki, T. Endoh, H. Sakuraba, and F. Masuoka, "The 2.4F2 Memory Cell Technology with Stacked-Surrounding Gate Transistor (S-SGT) DRAM," the Third International Conference on Modeling and Simulation of Microsystems (MSM), pp. 388-391, San Diego, March 27-29, 2000. [URL]
  669. A. Tanabe, M. Umetani, I. Fujiwara, T. Ogura, K. Kataoka, M. Okihara, H. Sakuraba, T. Endoh, and F. Masuoka, "A 10 Gb/s Demultiplexer IC in 0.18μm CMOS using Current Mode Logic with Tolerance to the Threshold Voltage Fluctuation," 2000 IEEE International Solid-State Circuits Conference (ISSCC) , pp. 62-63, San Francisco, CA, USA, February 9-9 2000. [DOI: 10.1109/ISSCC.2000.839692]
  670. T. Endoh, M. Hioki, H. Sakuraba, M. Lenski, and F. Masuoka, "Floating Channel Type SGT Flash Memory," 196th Meeting of The Electrochemical Society, 1999 Fall Meeting of The Electrochemical Society of Japan with technical cosponsorship of the Japan Society of Applied Physics, Vol. 99-2, Abstract# 1323, Honolulu, Hawaii, USA, October 17-22, 1999.
  671. H. Miya, M. Izumi, K. Yuasa, S. Konagata, Y. Kimura, L. Markus, T. Endoh, F. Masuoka, and T. Takahagi, "Loadlock Furnace Application to Ultrathin Oxide Films," the 7th International Conference on Advanced Thermal Processing of Semiconductors - RTP’99, pp. 244-251, Colorado Springs, September 1999.
  672. T. Endoh, K. Shinmei, H. Sakuraba, and F. Masuoka, "New Three Dimensional (3D) Memory Array Architecuture For Futurre Ultra High Density DRAM," International Workshop on Advanced LSI’s, pp. 237-242, 1998.
  673. F. Masuoka and T. Endoh, "Flash Memories, Their Status and Trends," Fourth International Conference on Solid-State and Integrated-Circuit Technology, pp. 128-132, Beijing, China, October 1995. [DOI: 10.1109/ICSICT.1995.499651]
  674. M. Momodomi, R. Shirota, K. Sakui, T. Endoh and F. Masuoka, "Trend of NAND Flash Memory and Future Development," International Workshop on Advanced LSI’s, pp. 219-225, 1995.
  675. K. Sakui, T. Tanaka, H. Nakamura, M. Momodomi, T. Endoh, R. Shirota, S. Watanabe, K. Ohuchi and F. Masuoka, "A Shielded Bitline Sensing Technology for a High-Density and Low Voltage NAND EEPROM Design," International Workshop on Advanced LSI’s, pp. 226-232, 1995.
  676. K. Shimizu, T. Endoh, and H. Iizuka, "Mechanism of AC-Stress-Induced Leakage Current in EEPROM Tunnel Oxides," IEEE International Reliability Physics Symposium (IRPS), pp. 56-60, Las Vegas, NV, USA, April 1995. [DOI: 10.1109/RELPHY.1995.513654]
  677. G. J. Hemink, T. Tanaka, T. Endoh, S. Aritome, and R. Shirota, "Fast and Accurate Programming Method for Multi-level NAND EEPROMs," 1995 Symposium on VLSI Technology, pp. 129-130, Kyoto, Japan, June 1995. [DOI: 10.1109/VLSIT.1995.520891]
  678. F. Masuoka, T. Endoh, K. Shimizu, H. Iizuka, S. Watanabe, and F. Masuoka, "A New Write/Erase Method for The Reduction of The Stress-Induced Leakage Current Based on The Deactivation of Step Tunneling Sites for Flash Memories," IEEE International Electron Device Meeting (IEDM), pp. 49-52, San Francisco, CA, USA, December 11-14, 1994. [DOI: 10.1109/IEDM.1994.383469]
  679. M. Momodomi, Seiichi Aritome, Ikuo Hatakeyama, Tetsuo Endoh, Tetsuya Yamaguchi, Susumu Shuto, Hirohisa Iizuka, Tooru Maruyama, Hiroshi Watanabe, Gertjan Hemink, Kouji Sakui, Tomoharu Tanaka, Masaki Momodomi, Riichiro Shirota, and Fujio Masuoka, "An Advanced NAND Structure Cell Technology For Reliable 3.3V 64Mb EEPROMs," International Conference on Advanced Microelectronic Devices and Processing, pp. 587-592, Sendai, Japan, March 3-5, 1994.
  680. F.MasuokaT.EndohS. Aritome, R. Shirota, G. Hemink, T. Endoh and F. Masuoka, “Reliability Issues of Flash Memory Cells.”, Proceedings of the IEEE, vol.81, Issue 5, pp.776-788, May 1993. [DOI: 10.1109/5.220908]
  681. T. Endoh, H. Iizuka, S. Aritome, R. Shirota, and F. Masuoka,“New write/erase operation technology for flash EEPROM cells to improve the read disturb characteristics”, IEEE International Electron Device Meeting (IEDM), pp.603-606, San Francisco, CA, USA, December 1992. [DOI: 10.1109/IEDM.1992.307433]
  682. R. Shirota, R. Nakayama, R. Kirisawa, M. Momodomi, K. Sakui, Y. Itoh, S. Aritome, T. Endoh, F. Hatori and F. Masuoka, "A 2.3 mu m/sup 2/ memory cell structure for 16 Mb NAND EEPROMs", IEEE International Electron Device Meeting (IEDM) , pp.103-106, San Francisco, CA, USA, December 1990. [DOI: 10.1109/IEDM.1990.237216]
  683. S. Aritome, R. Shirota, R. Kirisawa, T. Endoh, R. Nakayama, K. Sakui, and F. Masuoka, "A reliable bi-polarity write/erase technology in flash EEPROMs", IEEE International Electron Device Meeting (IEDM) , pp.111-114, San Francisco, CA, USA, December 1990. [DOI: 10.1109/IEDM.1990.237214]
  684. R. Kirisawa, S. Aritome, R. Nakayama, T. Endoh, R. Shirota, and F. Masuoka, "A NAND structured cell with a new programming technology for highly reliable 5 V-only flash EEPROM ," 1990 Symposium on VLSI Technology, pp.129-130, Honolulu, Hawaii, USA, June 1990. [DOI: 10.1109/VLSIT.1990.111042]
  685. S. Aritome, R. Kirisawa, T. Endoh, R. Nakayama, R. Shirota, K. Sakui, K. Ohuchi, and F. Masuoka, "Extended data retention characteristics after more than 10/sup 4/ write and erase cycles in EEPROMs," IEEE International Reliability Physics Symposium (IRPS), pp.259-264, New Orleans, LA, USA, March 1990. [DOI: 10.1109/RELPHY.1990.66097]
  686. T. Endoh, R. Shirota, Y. Tanaka, R. Nakayama, R. Kirisawa, S. Aritome, and F. Masuoka, "New design technology for EEPROM memory cells with 10 million write/erase cycling endurance " IEEE International Electron Device Meeting (IEDM), pp.599-602, Washington, DC, USA, December 3-6, 1989. [DOI: 10.1109/IEDM.1989.74352]
  687. R. Shirota, M. Momodomi, R. Nakayama, R. Kirisawa, Y. Itoh, Y. Iwata, T. Tanaka, S. Aritome, T. Endoh, and F. Masuoka, "Reliability Performance of the NAND EEPROM," 10TH IEEE NON-VOLATILE SEMICONDUCTOR MEMORY WORKSHOP (NVSMW), pp.92-94, 1989.
  688. M. Momodomi, R. Kirisawa, R. Nakayama, S. Aritome, T. Endoh, Y. Itoh, Y. Iwata, H. Oodaira, T. Tanaka, M. Chiba, R. Shirota, and F. Masuoka, "New Device technologies for 5V-only 4Mb EEPROM with NAND structure cell," IEEE International Electron Device Meeting (IEDM), pp.412-415, San Francisco, CA, USA, December 11-14, 1988. [DOI: 10.1109/IEDM.1988.32843]
  689. R. Shirota, T. Endoh, M. Momodomi, R. Nakayama, S. Inoue, R. Kirisawa, and F. Masuoka, "An accurate model of subbreakdown due to band-to-band tunneling and its application", IEEE International Electron Device Meeting (IEDM), pp.26-29, San Francisco, CA, USA, December 11-14, 1988. [DOI: 10.1109/IEDM.1988.32741]


  690. 国内会議


  691. 岩井信, 桜庭弘, 遠藤哲郎, 舛岡富士雄,“Buried Gate型SGTフラッシュメモリ,” 電子情報通信学会総合大会--エレクトロニクス, C-11-4, ページ:64, 東北大学, 2003年3月19日-22日. [URL]
  692. 山本安衛, 日置雅和, 遠藤哲郎, 桜庭弘, 舛岡富士雄,“3次元構造型Surrounding Gate Transistor (SGT)の下部拡散層形状の解析方法の提案,” 電子情報通信学会総合大会--エレクトロニクス, C-11-8, ページ:68, 東北大学, 2003年3月19日-22日. [URL]
  693. 松岡史宜, 日置雅和, 桜庭弘, 遠藤哲郎, 舛岡富士雄,“Surrounding Gate Transister (SGT) DRAMセルのソフトエラー現象の解析,” 電子情報通信学会総合大会--エレクトロニクス, C-11-3, ページ:63, 東北大学, 2003年3月19日-22日. [URL]
  694. 須永和久, 遠藤哲郎, 桜庭弘, 舛岡富士雄,“ULSI用超低消費電力CMOS降圧回路,” 電子情報通信学会技術研究報告 VLSI設計技術 (VLD), 巻:101, 号:694, ページ:73-78, 2002年2月28日. [URL]
  695. 須永和久, 遠藤哲郎, 桜庭弘, 舛岡富士雄,“ULSI用超低消費電力CMOS降圧回路,” 電子情報通信学会技術研究報告 集積回路(ICD), 巻:101, 号:696, ページ:73-78, 2002年2月28日. [URL]
  696. 木下和司, 遠藤哲郎, 谷上拓司, 和田昌久, 佐藤功太, 山田和也, 横山敬, 竹内昇, 田中研一, 栗屋信義, 﨑山恵三, 舛岡富士雄,“A Stacked-Surrounding Gate Transistor (S-SGT) Structured Cellを用いた新しい高密度フラッシュメモリ,” 電子情報通信学会技術研究報告 シリコン材料・デバイス(SDM), 巻:101, 号:573, ページ:43-48, 2002年1月22日. [URL]
  697. 日置雅和, 遠藤哲郎, マルクス レンスキ, 桜庭弘, 舛岡富士雄,“Floating Channel type SGT(FC-SGT)フラッシュメモリにおけるカップリング比の柱半径依存性,” 電子情報通信学会2002年総合大会講演 エレクトロニクス, C-11-6, ページ:78, 早稲田大学, 2002年3月27日-30日. [URL]
  698. 松岡史宜, 日置雅和, 桜庭弘, 遠藤哲郎, 舛岡富士雄,“Double Gate-SOI(DG-SOI)MOSFETにおけるソフトエラー現象の解析,” 電子情報通信学会2002年総合大会講演 エレクトロニクス, C-11-5, ページ:77, 早稲田大学, 2002年3月27日-30日. [URL]
  699. 岩井信, 太田人嗣, 鈴木正彦, 桜庭弘, 遠藤哲郎, 舛岡富士雄,“Multi-Pillar Surrounding Gate型MOSキャパシタの試作プロセス,” 電子情報通信学会2002年総合大会講演 エレクトロニクス, C-11-4, ページ:76, 早稲田大学, 2002年3月27日-30日. [URL]
  700. 西亮輔, 鈴木正彦, 桜庭弘, 遠藤哲郎, 舛岡富士雄,“Surrounding Gate Transistorにおける基板バイアス効果の拡散層形状依存性,” 電子情報通信学会2002年総合大会講演 エレクトロニクス, C-11-3, ページ:75, 早稲田大学, 2002年3月27日-30日. [URL]
  701. 須永和久, 遠藤哲郎, 桜庭弘, 舛岡富士雄,“高電流利用効率を実現したCMOS降圧回路の直流特性,” 電子情報通信学会2002年総合大会講演 エレクトロニクス, C-11-1, ページ:73, 早稲田大学, 2002年3月27日-30日. [URL]
  702. 鈴木正彦, 岩井信, 桜庭弘, 遠藤哲郎, 舛岡富士雄,“Stacked - SGT DRAMを用いた2.4F2メモリセル技術,” 電子情報通信学会2002年エレクトロニクスソサイエティ大会講演論文集, C-11-6, ページ:63, 2002年8月20日. [URL]
  703. 岩井信, 太田人嗣, 鈴木正彦, 桜庭弘, 遠藤哲郎, 舛岡富士雄,“Si柱側壁表面の平滑化,” 電子情報通信学会2002年エレクトロニクスソサイエティ大会講演論文集, C-11-5, ページ:62, 2002年8月20日. [URL]
  704. 松岡史宜, 日置雅和, 桜庭弘, 遠藤哲郎, 舛岡富士雄,“Double Gate-SOI (DG-SOI) MOSFET のソフトエラーのα粒子入射軌道依存性,” 電子情報通信学会2002年エレクトロニクスソサイエティ大会講演論文集, C-11-4, ページ:61, 2002年8月20日. [URL]
  705. 岩井信, 遠藤哲郎, 桜庭弘, 舛岡富士雄, 「高集積化を実現するFloating Channel type SGT (FC-SGT) Flashメモリセルのビットライン形成法」, 電子情報通信学会2001年エレクトロニクスソサイエティ大会講演, C-11-5,ページ:87, 2001年8月29日. [URL]
  706. 山下弘臣, 遠藤哲郎, 岩井信, 桜庭弘, 舛岡富士雄, 「Double Gate MOSFETの新しい構造と試作プロセスの提案」, 電子情報通信学会2001年エレクトロニクスソサイエティ大会講演, C-11-10, ページ:92, 2001年8月29日. [URL]
  707. 須永和久, 遠藤哲郎, 桜庭弘, 舛岡富士雄, 「」, 電子情報通信学会2001年エレクトロニクスソサイエティ大会講演, C-11-9, ページ:91, 2001年8月29日. [URL]
  708. 中村広記, 遠藤哲郎, 桜庭弘, 舛岡富士雄, 「超低消費電力を指向したオンチップ用CMOS降圧回路」, 電子情報通信学会2001年エレクトロニクスソサイエティ大会講演, C-11-7, ページ:89, 2001年8月29日. [URL]
  709. 日置雅和, 遠藤哲郎, レンスキマルクス, 桜庭弘, 舛岡富士雄, 「Floating Channel type SGT (FC-SGT)フラッシュメモリにおける書込・消去特性の柱半径依存性」, 電子情報通信学会2001年エレクトロニクスソサイエティ大会講演, C-11-6, ページ:88, 2001年8月29日. [URL]
  710. 須永和久, 遠藤哲郎, 桜庭弘, 舛岡富士雄, 「超低消費電力降圧回路の試作」, 電子情報通信学会2001年エレクトロニクスソサイエティ大会講演, C-11-2, ページ:56, 2001年8月29日. [URL]
  711. 西亮輔, 鈴木正彦, 桜庭弘, 遠藤哲郎, 舛岡富士雄, 「Surrounding Gate Transistorにおける基板バイアス効果を抑制するためのソース・ドレインエンジニアリング」, 電子情報通信学会2001年エレクトロニクスソサイエティ大会講演, C-11-6, ページ:60, 2001年8月29日. [URL]
  712. 岩井信, 太田人嗣, 鈴木正彦, 桜庭弘, 遠藤哲郎, 舛岡富士雄, 「0.4μmMOSプロセス技術を用いたMulti-Pillar Surrounding Gate 型 MOS キャパシタ」, 電子情報通信学会2001年エレクトロニクスソサイエティ大会講演, C-11-5, ページ:59, 2001年8月29日. [URL]
  713. 日置雅和, 遠藤哲郎, マルクスレンスキ, 桜庭弘, 舛岡富士雄, 「Floating Channel type SGT (FC-SGT) フラッシュメモリにおける書込・消去特性のフローティングゲート膜厚依存性」, 電子情報通信学会2001年エレクトロニクスソサイエティ大会講演, C-11-4, ページ:58, 2001年8月29日. [URL]
  714. 岩井信, 太田人嗣, 鈴木正彦, 桜庭弘, 遠藤哲郎, 舛岡富士雄, 「0.4μmMOSプロセス技術を用いたMulti-Pillar Surrounding Gate型MOSキャパシタ」, 電子情報通信学会技術研究報告 (SDM) シリコン材料・デバイス, 巻:101, 号:164, ページ:143-147, 2001年6月29日. [URL]
  715. 岩井信, 太田人嗣, 鈴木正彦, 桜庭弘, 遠藤哲郎, 舛岡富士雄, 「0.4μmMOSプロセス技術を用いたMulti-Pillar Surrounding Gate型MOSキャパシタ」, 電子情報通信学会技術研究報告 (ED) 電子デバイス , 巻:101, 号:161, ページ:143-147, 2001年6月29日. [URL]
  716. 須永和久, 遠藤哲郎, 桜庭弘, 舛岡富士雄,「超高電流利用率を実現したULSI用降圧回路」,電子情報通信学会2000年エレクトロニクスソサイエティ大会講演論文集2, C-12-9, ページ:89, 2000年9月7日.[URL]
  717. 三浦雅和, 遠藤哲郎, 桜庭弘, 舛岡富士雄,「GHz 動作における拡散層:拡散層間クロストークの解析」,電子情報通信学会2000年エレクトロニクスソサイエティ大会講演論文集2, C-11-12, ページ:80, 2000年9月7日.[URL]
  718. 太田人嗣, 遠藤哲郎, 桜庭弘, 舛岡富士雄,「Multi-Pillar Surrounding Gate Transistorの高速動作に関する解析」,電子情報通信学会2000年エレクトロニクスソサイエティ大会講演論文集2, C-11-11, ページ:79, 2000年9月7日. [URL]
  719. 坂本渉, 遠藤哲郎, 桜庭弘, 舛岡富士雄,「部分空乏型および完全空乏型SOI MOSFET の過渡応答」,電子情報通信学会2000年エレクトロニクスソサイエティ大会講演論文集2, C-11-9, ページ:77, 2000年9月7日. [URL]
  720. 日置雅和, 遠藤哲郎, レンスキマルクス, 桜庭弘, 舛岡富士雄,「Floating Channel type SGT (FC-SGT) フラッシュメモリにおける消去動作の解析」,電子情報通信学会2000年エレクトロニクスソサイエティ大会講演論文集2, C-11-7, ページ:75, 2000年9月7日. [URL]
  721. 岩井信, 遠藤哲郎, 桜庭弘, 舛岡富士雄,「Floating Channel type SGT (FC-SGT) Flash メモリセルにおけるフローティングチャネル形成プロセス」,電子情報通信学会2000年エレクトロニクスソサイエティ大会講演論文集2, C-11-6, ページ:74, 2000年9月7日.[URL]
  722. 松岡史宜, 遠藤哲郎, 桜庭弘, 舛岡富士雄,「Surrounding Gate Transistor (SGT) DRAM のソフトエラー耐性に関する考案」,電子情報通信学会2000年エレクトロニクスソサイエティ大会講演論文集2, C-11-3, ページ:71, 2000年9月7日.[URL]
  723. 鈴木正彦, 遠藤哲郎, 桜庭弘, 舛岡富士雄,「Stacked-SGT DRAM のセルデザインの提案」,電子情報通信学会2000年エレクトロニクスソサイエティ大会講演論文集2, C-11-2, ページ:70, 2000年9月7日.[URL]
  724. 舛岡富士雄, 遠藤哲郎, 「FLASHメモリ技術動向と将来」, 電子情報通信学会技術研究報告 (ICD) 集積回路, 巻:100, 号:6, ページ:19-24, 2000年4月14日. [URL]
  725. 中村広記, 遠藤哲郎, 桜庭弘, 舛岡富士雄, 「三次元階層型メモリアレイ技術を用いたStacked-SGT DRAM のアレイ構成及び読み出し方法」, 電子情報通信学会2000年総合大会講演論文集 エレクトロニクス2, C-12-73, ページ:168, 2000年3月7日. [URL]
  726. 須永和久, 遠藤哲郎, 桜庭弘, 舛岡富士雄, 「超低消費電力を指向したULSI用降圧回路」, 電子情報通信学会2000年総合大会講演論文集 エレクトロニクス2,C-12-20, ページ:115, 2000年3月7日. [URL]
  727. 森雅朋, 遠藤哲郎, 桜庭弘, 舛岡富士雄, 「理想的なSファクタを実現する完全空乏型 Double-Gate SOI MOSFET のスケーリング理論」,電子情報通信学会2000年総合大会講演論文集 エレクトロニクス2, C-11-15, ページ:94, 2000年3月7日. [URL]
  728. 鈴木正彦, 遠藤哲郎, 桜庭弘, 舛岡富士雄,「Stacked-SGT DRAM を用いた2.4F2メモリセル技術」,電子情報通信学会2000年総合大会講演論文集 エレクトロニクス2, C-11-12, ページ:91, 2000年3月7日.[URL]
  729. 太田人嗣, 遠藤哲郎, 桜庭弘, 舛岡富士雄,「高速動作・低消費電力 M-SGT 試作プロセスの提案」,電子情報通信学会2000年総合大会講演論文集 エレクトロニクス2, C-11-11, ページ:.90, 2000年3月7日. [URL]
  730. 日置雅和, 遠藤哲郎, レンスキマルクス, 桜庭弘, 舛岡富士雄,「Floating Channel type (FC-SGT) Flash メモリにおける書込・消去特性の数値的解析」,電子情報通信学会2000年総合大会講演論文集 エレクトロニクス2, C-11-9, ページ:.88, 2000年3月7日. [URL]
  731. 岩井信, 遠藤哲郎, 桜庭弘, 舛岡富士雄,「Floating Channel type SGT (FC-SGT) Flash メモリの試作プロセスの提案」,電子情報通信学会2000年総合大会講演論文集 エレクトロニクス2, C-11-8, ページ:87, 2000年3月7日. [URL]
  732. 木村康隆, 遠藤哲郎, レンスキマルクス, 舛岡富士雄,「均一な厚さの極薄シリコン酸化膜を形成するための酸化炉搬入方法」,電子情報通信学会2000年総合大会講演論文集 エレクトロニクス2, C-11-3, ページ:82, 2000年3月7日. [URL]
  733. 中村広記, 遠藤哲郎, 桜庭弘, 舛岡富士雄,「低Bit Line 容量を実現する三次元階層型メモリアレイ技術を用いたStacked-SGT DRAM」,電子情報通信学会2000年エレクトロニクスソサイエティ大会講演論文集2, C-11-1, ページ:69, 2000年3月7日. [URL]
  734. 須永和久, 遠藤哲郎, 桜庭弘, 舛岡富士雄,「超低消費電力を指向したULSI用降圧回路の試作」,電子情報通信学会1999年エレクトロニクスソサイエティ大会講演論文集2, C-12-26, ページ:96, 1999年8月16日. [URL]
  735. 森雅朋, 遠藤哲郎, 桜庭弘, 舛岡富士雄,「完全空乏型Double-Gate SOI MOSFETの短チャネル効果の解析及びスケーリング理論の提案」,電子情報通信学会1999年エレクトロニクスソサイエティ大会講演論文集2, C-11-6, ページ:69, 1999年8月16日. [URL]
  736. 日置雅和, 遠藤哲郎, レンスキマルクス, 桜庭弘, 舛岡富士雄,「Floating Channel type SGT (FC-SGT) Flashメモリにおける書込・消去動作の解析」,電子情報通信学会1999年エレクトロニクスソサイエティ大会講演論文集2, C-11-4, ページ:67, 1999年8月16日. [URL]
  737. 鈴木正彦, 遠藤哲郎, 桜庭弘, 舛岡富士雄,「三次元階層型メモリアレイ技術を用いたStacked-SGT DRAM」,電子情報通信学会1999年エレクトロニクスソサイエティ大会講演論文集2, C-11-3, ページ:66, 1999年8月16日. [URL]
  738. 船木寿彦, 遠藤哲郎, 桜庭弘, 舛岡富士雄, 「新しい基板コンタクト型パストランジスタの提案」, 電子情報通信学会1999年エレクトロニクスソサイエティ大会講演論文集2, C-11-2, ページ:65, 1999年8月16日. [URL]
  739. 片岡耕太郎, 藤原郁夫, 林田茂樹, 小倉孝之, 梅谷正人, 田辺昭, 桜庭弘, 遠藤哲郎, 舛岡富士雄, 「微細MOSFETデバイスの試作に用いる電子線描画に関する研究」,電子情報通信学会技術研究報告 (SDM) シリコン材料・デバイス研究会, 巻:99, 号:457, ページ:35-42, 1999年1月22日. [URL]
  740. 田辺昭, 梅谷正人, 藤原郁夫, 小倉孝之, 片岡耕太郎, 林田茂樹, 松尾明, 桜庭弘,遠藤哲郎, 舛岡富士雄, 「全パターンをEBで露光した0.2μm nMOSFETの試作」, 電子情報通信学会技術研究報告 (SDM) シリコン材料・デバイス研究会, 巻:98, 号:555, ページ:13-18, 1999年1月22日. [URL]
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  743. 有留誠一、白田理一郎、遠藤哲郎、舛岡富士雄,“フラッシュメモリの信頼性”, 電子情報通信学会技術研究報告 (SDM) シリコン材料・デバイス, 巻:93, 号:191, ページ:41-48, 1993年8月23日. [URL]
  744. 遠藤哲郎、白田理一郎、中山良三、桐澤亮平、百富正樹、作井康司、有留誠一、羽鳥文敏、舛岡富士雄,“16Mbit NAND型EEPROMの2.3μm2メモリセル技術.”, 電子情報通信学会技術研究報告 (SDM) シリコン材料・デバイス , 巻:91, 号:65, ページ:19-26, 1991年5月24日.
  745. 有留誠一、白田理一郎、桐澤亮平、遠藤哲郎、中山良三、作井康司、舛岡富士雄,“フラッシュEEPROMセルの信頼性を向上させる書込み-消去方法.”, 電電子情報通信学会技術研究報告 (SDM) シリコン材料・デバイス, 巻:91, 号:65, ページ:31-36, 1991年5月24日.
  746. 遠藤哲郎、白田理一郎、田中義幸、中山良三、桐沢亮平、有留誠一、舛岡富士雄,郎, “107 回のデータ書換えが可能なEEPROMセル”, 電子情報通信学会技術研究報告 (SDM) シリコン材料・デバイス, 巻:90, 号:47, ページ:55-61, 1990年5月21日.
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