国際会議

2024

  • "FPGA-Based Deep-Pipelined Architecture for Vision Transformer's Multi-Head Attention”, Hasitha Muthumala Waidyasooriya, Masanori Hariyama and Daisuke Tanaka, The 25th Workshop on Synthesis And System Integration of Mixed Information Technologies (SASIMI 2024), pp.160-163, 2024-03-11 (Taiwan-Taipei)

  • "Architecture of an FPGA-Based Brain Neural Network Simulator Using Direct Mapping”, Hasitha Muthumala Waidyasooriya, Mizuki Harasawa and Masanori Hariyama, The 25th Workshop on Synthesis And System Integration of Mixed Information Technologies (SASIMI 2024), pp.333-334, 2024-03-11 (Taiwan-Taipei)

2022

  • "FPGA-based Prototype of a Quantum Annealing Simulator for Sparse Ising Model ", Hasitha Muthumala Waidyasooirya, Yuta Ohma and Masanori Hariyama, 15th IEEE International Symposium on Embedded Multicore/Many-coreSystems-on-Chip (MCSoC-2022), (2022-12-19, Malaysia) [PDF]

  • "Word2Vec FPGA Accelerator Based on Spatial and Temporal Parallelism ", Hasitha Muthumala Waidyasooirya, Shutaro Ishihara and Masanori Hariyama, Parallel and Distributed Computing, Applications and Technologies. PDCAT 2022. Lecture Notes in Computer Science, vol 13798. Springer, Cham. https://doi.org/10.1007/978-3-031-29927-8_6, (2022-12-07, Sendai, Japan) [PDF]

  • [poster presentation] "Scalable Architecture Targeting HBM-Based FPGAs for Complex Matrix Multiplication", Hasitha Muthumala Waidyasooirya, Takuro Fukuda and Masanori Hariyama, 23rd International Conference on Parallel and Distributed Computing, Applications and Technologies (PDCAT'22), (2022-12-07, Sendai, Japan)

  • [poster presentation] "Direct Mapping of Neural Circuits on FPGA", Mizuki Harasawa, Hasitha Muthumala Waidyasooirya and Masanori Hariyama, 23rd International Conference on Parallel and Distributed Computing, Applications and Technologies (PDCAT'22), (to be published)

  • [Invited talk] "FPGA Acceleration of Quantum Annealing Simulations”, Hasitha Muthumala Waidyasooirya, 2022 Japan–Taiwan Advanced Quantum Technology Research and Development Workshop , (2022-11-25, Sendai, Japan).

  • "OpenCL-Based Design of an FPGA Accelerator for H.266/VVC Transform and Quantization ", Hasitha Muthumala Waidyasooirya, Masanori Hariyama, Hiroe Iwasaki, Daisuke Kobayashi, Yuya Omori, Ken Nakamura, Koyo Nitta, and Kimikazu Sano, IEEE International Midwest Symposium on Circuits and Systems (MWSCAS), DOI:10.1109/MWSCAS54063.2022.9859281　(2022-08-08, Fukuoka Japan, Online) [PDF]

  • "Implementation of an FPGA-Oriented Complex Number Computation Library Using Intel OneAPI DPC++", Kosiro Obata, Hasitha Muthumala Waidyasooriya and Masanori Hariyama, IEEE International Midwest Symposium on Circuits and Systems (MWSCAS), DOI: 10.1109/MWSCAS54063.2022.9859514 (2022-08-08, Fuku oka Japan, Online) [PDF]

  • "AI, deep learning-based automatic tracking implies synchronicity within adult pairs of common marmosets", Mayuko Yoda , Mohamad Adam Bin Sabarudin , Hayato Sakurai , Hiroko Kakei , Masakazu Honda , Tetsuya Kunikata , Hideo Yamanouchi , Yoshimasa Kamei , Masanori Hariyama , Ricki Colman , Mamiko Koshiba, Regional "Stress and Behavior" ISBS Conference, vol. 2, e022003, pp. 14-18 (2022-12). DOI: 10.34417/sbb.2.1.14

2021

  • [Invited talk] "FPGA-based Custom Supercomputing for Intelligent Systems ", Hasitha Muthumala Waidyasooirya, 2021 Bilateral Workshop between Tohoku University and National Tsing Hua University (2021-11-24, Sendai, online)
  • "Quantitative evaluation of an FPGA-based SQA accelerator exploiting Trotter-slice parallelism”, Chia-Yin Liu, Hasitha Muthumala Waidysooriya, Masanori Hariyama, Adiabatic Quantum Computing Conference 2021 (AQC 2021) (2021-06-22, online) [PDF]
  • [Invited talk] "Real-world Intelligent Systems and Energy-Efficient Accelerators", Masanori Hariyama, The 2nd International Symposium on AI Electronics(2021-02-15, Sendai, online)

2020

  • "Thermal-aware memory system synthesis for MPSoCs with 3D-stacked hybrid memories", Chia-Yin Liu, Yi-Jung Chen, and Masanori Hariyama, 35th Annual ACM Symposium on Applied Computing (SAC’20), pp.546-553, (2020-04-03, Brno, Czech Republic ) (doi:10.1145/3341105.3373858)

2019

  • "A Memory-Bandwidth-Efficient Word2vec Accelerator Using OpenCL for FPGA", Tomoki Shoji, Taisuke Ono, Hasitha Muthumala Waidyasooriya, Masanori Hariyama. Yuichiro Aoki, Yuki Kondoh, and Yaoko Nakagawa, 7th International Workshop on Computer Systems and Architectures", pp.103-108, (2019-11-29, Nagasaki, Japan)
  • "Data-Transfer-Bottleneck-Less Architecture for FPGA-Based Quantum Annealing Simulation ”, Chia-Yin Liu, Hasitha Muthumala Waidysooriya, and Masanori Hariyama, 7th International Symposium on Computing and Networking (CANDAR), pp.164-170, (2019-11-27, Nagasaki, Japan)
  • Benchmarks for FPGA-Targeted High-Level-Synthesis" ,Hasitha Muthumala Waidysooriya, Yasuaki Iimura, and Masanori Hariyama, 7th International Symposium on Computing and Networking (CANDAR), pp.232-238, (2019-11-27, Nagasaki, Japan)
  • (Invited Talk) "Energy-Efficient Custom Supercomputing for Intelligent Systems", Masanori Hariyama, ,International Symposium for Advanced Computing and Information Technology (2019-08-23, Kaohsiung, Taiwan)
  • "Energy-efficient Supercomputing Using Field Programmable Gate Arrays", Masanori Hariyama, CWRU-Tohoku Joint Workshop, (2019-08-06, Cleaveland, USA)
  • "FPGA-Based Acceleration of Word2vec using OpenCL", Taisuke Ono, Tomoki Shoji, Hasitha Muthumala Waidyasooriya, Masanori Hariyama. Yuichiro Aoki, Yuki Kondoh, and Yaoko Nakagawa, International Symposium on Circuits and Systems (ISCAS 2019), pp.1-5, (2019-05-29, Sapporo, Japan)

2018

  • "Accelerator Architecture for Simulated Quantum Annealing Based on Resource-Utilization-Aware Scheduling and its Implementation Using OpenCL", Hasitha Muthumala Waidyasooriya, Yusuke Araki and Masanori Hariyama, International Symposium on Intelligent Signal Processing and Communication Systems (ISPACS 2018), pp.336-340, (2018-11-29, Ishigaki, Japan)

  • "A System for Estimating Optimal Resected Liver Regions Considering Practical Surgical Constraints", Yaya Watanabe, Masanori Hariyama, Mitsugi Shimoda, International Symposium on Intelligent Signal Processing and Communication Systems (ISPACS 2018), pp.415-420, (2018-11-28, Ishigaki, Japan)

  • "INDOOR AND OUTDOOR POSITIONING SYSTEMS FOR BEHAVIORAL ANALYSIS OF CHILDREN", M. Hariyama, N. Miyamoto, Y. Kobayashi, M. Koshiba, T. Matunaga, R. Kai, H. Watanabe, S. Ito, T. Kubota, M. Senda, S. Taniguchi, 15th International Regional (Asia) ISBS Neuroscience and Biological Psychiatry “Stress and Behavior” Conference (2018-09-09, Ube, Yamaguchi, Japan)

  • "FAMILIAR OR UNFAMILIAR INFANT-SOCIAL DISTANCE DURING PLAY VISUALIZED BY GPS, CONFIRMED BY VIDEO" R. Kai, T. Matunaga, S. Yokota, S. Suzuki, KJ Singh, R. Kanazawa, M. Hariyama, N. Miyamoto, Y. Kobayashi, H. Watanabe, S. Ito, T. Kubota, M. Senda, S. Taniguchi. M. Koshiba, 15th International Regional (Asia) ISBS Neuroscience and Biological Psychiatry “Stress and Behavior” Conference (2018-09-09, Ube, Yamaguchi, Japan)

  • "Architecture of an FPGA-Based Heterogeneous System for Code-Search Problems", Yuki Hiradate, Hasitha Muthumala Waidyasooriya, Masanori Hariyama and Masaaki Harada, SCAsia 2018, Supercomputing Frontiers. SCFA 2018. Lecture Notes in Computer Science, vol 10776 (2018-03-28, Singapore) [PDF]

  • "Implementation of an FPGA Accelerator for Text Search Using a Wavelet-Tree-Based Succinct-Data-Structure", Taisuke Ono, Hasitha Muthumala Waidyasooriya and Masanori Hariyama, 13th International Conference on 
High-Performance and Embedded Architectures and Compilers (HiPEAC), pp. 1-12 (2018-01-24, Manchester, United Kingdom) [PDF]

2017

  • [Invited Talk] "BEHAVIOR ANALYSIS OF CHILDREN USING A HIGH-ACCURACY GPS SYSTEM", M. Hariyama, N. Miyamoto, M. Koshiba, H. Watanabe, S. Ito, S. Shimazaki, T. Kubota, M. Senda, S. Taniguchi, Proc. 12th International Neuroscience and Biological Psychiatry Regional ISBS Conference STRESS AND BEHAVIOR: YOKOHAMA-2017, (2017-07-25, Yokohama, Japan)
  • "Architecture of an FPGA Accelerator for LDA-Based Inference", Taisuke Ono, Hasitha Muthumala Waidyasooriya, Masanori Hariyama and Tsukasa Ishigaki, 18th IEEE/ACIS International Conference on Software Engineering, Artificial Intelligence, Networking and Parallel/Distributed Computing (SNPD), pp. 357-362 (2017-06-28, Kanazawa, Japan) [PDF]
  • "Automatic Optimization of OpenCL-Based Stencil Codes for FPGAs", Tsukasa Endo, Hasitha Muthumala Waidyasooriya and Masanori Hariyama", 18th IEEE/ACIS International Conference on Software Engineering, Artificial Intelligence, Networking and Parallel/Distributed Computing, Springer International Publishing, pp.75-89 (2017-06-28, Kanazawa, Japan) doi: 10.1007/978-3-319-62048-0_6 [PDF]

2016

  • "FPGA architecture for 3-D FDTD acceleration using open CL", Hasitha Muthumala Waidyasooriya, Masanori Hariyama and Yasuo Ohtera, Progress in Electromagnetics Research Symposium (PIERS), pp. 4719-4719(2016) doi: 10.1109/PIERS.2016.7735734
  • [SPECIAL RECOGNITION AWARD] "Multiscale, Multiphysics Computational Chemistry Methods based on Artificial Intelligence Integrated Ultra-Accelerated Quantum Molecular Dynamics for the Application to Automotive Emission Control", Akira Miyamoto, Kenji Inaba, Yukie Ishizawa, Manami Sato, Rei Komuro, Masashi Sato, Ryo Sato, Patrick Bonnaud, Ryuji Miura, Ai Suzuki, Naoto Miyamoto, Nozomu Hatakeyama, Masanori Hariyama, SAE/JSAE 2016 Small Engine Technology Conference and Exhibition (2016-11-17)
  • "FPGA-Based Deep-Pipelined Architecture for FDTD Acceleration Using OpenCL", Hasitha Muthumala Waidyasooriya and Masanori Hariyama, 15th IEEE/ACIS International Conference on Computer and Information Scienc (ICIS 2016), pp.109-114 (2016-06-29) [PDF]
  • "Architecture of an FPGA Accelerator for Molecular Dynamics Simulation Using OpenCL", Hasitha Muthumala Waidyasooriya, Masanori Hariyama and Kota Kasahara, 15th IEEE/ACIS International Conference on Computer and Information Science (ICIS 2016), pp.115-119,2016-06-29 [PDF]
  • "Hardware-Oriented Succinct-Data-Structure based on the Block-Size-Constrained Compression", Hasitha Waidyasooriya, Daisuke Ono and Masanori Hariyama, Proc. International Conference on Soft Computing and Pattern Recognition(SoCPaR) , pp.136-140(2015) [PDF]